Change-Id: I8567ae9e17f2f685ab9d8ce476bfeb8d16481dd7
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Simplify the cache management by removing most of the logic from the
driver itself to user overridable weak functions for cache flush/clean
and invalidation.

The driver now calls the cache flush/clean before each NPU command
stream with a full list of base pointers/base addresses and their size.
This allows full freedom to implement any desired logic for cache
coherence management outside of the driver. This changes the function
prototype for the flush and invalidate functions.

As there's no longer a need to keep a bitmask of which base
pointers/addresses to flush/clean/invalidate, those functions have been
removed.

To guarantee that the driver works in all cases and doesn't get affected
by potential speculative loads, the cache invalidation call has been
moved to after the NPU has finished.

Due to the backwards incompatible changes to the function prototypes,
the driver version has been bumped to 1.0.0

Change-Id: Ibfd755876842edc911fecebf34fa80c22f287ca4
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Change-Id: Id66a7e401a134bad6b6b696dbee22546e298b190
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Replace empty log macros with calls to a new LOG_COMMON_NOP macro, with
the intention of avoiding unused variable/parameter warnings where the
variables/parameters are currently only used for logging. The if check
will normally be optimized away.

Change formatting of error messages, prepend the file name and line
instead of appending it, to allow for newlines in error messages.

Add a check for __FILE_NAME__ macro and use that instead of strrchr
function, when available.

Fix broken LOG macro

Correct copyright years

Change-Id: Ic443a6ba6d4f723c9272e605a2d975413ffe9a66
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Kevin Bracey authored Mar 12, 2025 and Jonny Svärd committed Mar 13, 2025

Allow config and hence port selection to be done at run-time based on
region address, avoiding need to recompile C code for linker map
changes, and permitting an application to have one model in SRAM and
another in external memory.

Change-Id: I425ee1ad2598b65a3c891261a7eff00e9565bdbe
Signed-off-by: Kevin Bracey <kevin.bracey@alifsemi.com>
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Several repos have moved from ML Platform to GitLab, change all
references to use the new location.

Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>
Change-Id: Ie0a1023c1fd80de9622bf61992cde6846b9d674e

Update the README document with details of various compiler flags used
to make it easier for the user to find them.

Change-Id: I96a565b1384e211c4e68f0f11e1578261b6c1925
Signed-off-by: Rajasekaran Kalidoss <rajasekaran.kalidoss@arm.com>

Add comments about ethosu_flush_dcache() being deprecated and not
recommended to be implemented. Cache coherency for regions that are
shared by the CPU and NPU are to be handled by the application before an
inference is invoked, as the driver will otherwise do it for every
invokation hurting performance.

Remove cache flush/clean and invalidation calls for all base pointers
and instead add a cache flush/clean and invalidation base pointer mask.
This mask defaults to only mark the scratch base pointer (tensor arena)
for both flush/clean and invalidation. The scratch base pointer is the
only one containg RW data shared between the CPU and NPU.

For the typical case, cache invalidation is only required to be done on
the scratch/tensor arena base pointer, as that contains the OFM data.
All other base pointers are either read only or in the case of dedicated
sram mode being used, the fast memory is only meant to be used by the
NPU and thus no cache coherency issues exist.

Add a helper function to allow the cache masks to be modified for
advanced use cases. The cache mask for flush and invalidate are both 8
bit masks where bit 0 corresponds to base pointer 0, bit 1 corresponds
to base pointer 1 etc.

Update previously incorrect documentation that the addresses shipped to
cache functions needs to be 16 byte aligned, they need to be 32 byte
aligned (or the cache line size of the CPU).

Invalidation of the complete cache is no longer supported as this is
potentially dangerous, especially in async use cases where the CPU might
be doing other things while the NPU is running. base_addr_size is now
required to be set for all invoke calls, or an assert will trigger.

Change-Id: Ica665ebfb84329ec5e56c224859516036fc08d2c
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Change-Id: I34245f4e3a7636e54004d4e755900633f33f15d3
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Rajasekaran Kalidoss authored Sep 23, 2024 and Rajasekaran Kalidoss committed Oct 04, 2024

The debug print in IRQ handler can lead to unexpected behaviour. This patch removes the debug log print in the IRQ handler.

Change-Id: Icab1695962d92eb52725961b820fffe36378bd80
Signed-off-by: Rajasekaran Kalidoss <rajasekaran.kalidoss@arm.com>

 - Update pmu event type to match latest interface file

Change-Id: I715bc030920a957e19373fd513fefef5b7138a23
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

Let the hardware limit the actual max value rather than configuring it
with software, to simplify and prevent accidental misconfigurations.

Change-Id: I2e703715c99a39056f5d52daa92cf86232cb6ed6
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Ethos-U85 supports power ramping up/down control, aimed at reducing
rapid changes in power consumption at beginning and end of intensive
operations.

Change-Id: Ifcf29dbd008d480c0d64323bedce121c53beaec4
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Change-Id: If8ffb733f04daf4f3f49629660dcfeb30133723c
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Remove old leftover build option

Change-Id: Ib2b2bed1d7f17f30802382fbe102f66f35e2165a
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Rajasekaran Kalidoss authored Apr 19, 2024 and Rajasekaran Kalidoss committed Jun 03, 2024

This patch adds -Werror flag to treat warnings as errors.

Change-Id: I18ee200af238279976f2561c58414954dcb76332
Signed-off-by: Rajasekaran Kalidoss <rajasekaran.kalidoss@arm.com>

As there is max one device per driver handle, store the device
struct in the driver struct and get rid of the malloc call from
the device init code.

Change-Id: I0f98a78907cb322d98278e9adc314e3c05f54308
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Change-Id: I28d7cb72c149a636a4f1d8ca6931316486b1829a
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

A void pointer(fast_memory) was type casted to uint64_t. This resulted
in a compiler warning [-Wpointer-to-int-cast]. This patch fixes the
warning.

Change-Id: I61d4a77664c7a2af7b9020f8a98c10d27c78334f
Signed-off-by: Rajasekaran Kalidoss <rajasekaran.kalidoss@arm.com>

Rajasekaran Kalidoss authored Apr 22, 2024 and Jonny Svärd committed Apr 23, 2024

This patch fixes warning messages reported by the compiler related to
argument format and type mismatch.

Change-Id: I0ed528649414555f3136e745f37a78344a2b0add
Signed-off-by: Rajasekaran Kalidoss <rajasekaran.kalidoss@arm.com>

Make sure that pmu_event_value returns a valid PMU event value
before writing to PMU HW registers.

Change-Id: I546493a7870fc73ef2b7269cd4d7be4072c3cebf
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Add missing ethosu_semaphore_destroy and ethosu_mutex_destroy function
prototypes to the driver header.

Change-Id: I16f71637b624964bbd9281ce8ad984304fedb406
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Introduce ETHOSU_INFERENCE_TIMEOUT CMake variable to set an
arbitrary timeout value that will be sent as argument to
ethosu_semaphore_take() for the interrupt semaphore. Adding
the ability to have a timeout for an inference. (Defaults to
no timeout/wait forever.)

Implement a placeholder mutex for the baremetal example and add
error checks for mutex_create() call.

Change-Id: Ia74391620340a27c23dc3d15f9ba742c674c8bfa
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Add new ETHOSU_LOG_ENABLE variable in the CMakeLists.txt to toggle
logging completely off, or else by the desired severity level.
Turning off the logging will also disable the LOG() macro.

Change-Id: I313a97fb1569000ae22637734ef4a60eedc56f70
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>

Change-Id: Iebbf8243fe97cc9195920e1ba3f4b35005e7c01a

Change-Id: Ic370f071eb4f3ed83cd9e5a6b587d7d527c37825

Improve the mutex protection around shared data

Rework so that registering a driver gives a semaphore to the
driver semaphore count, deregistering it takes it (removes one
from the count) of available driver handles.

Change-Id: I9b74ed87b9371490d0ffcc8516f65bcab56d05bb

Update documentation in driver header file.

Some functions were inconsistently returning boolean status. These
functions have been updated to return integer status, with 0 on
success and negative error code on failure.

Change-Id: Ie044bf5b4f2daaff348e698fa6147472dbc582a9

Add new weak function ethosu_address_remap() that allows the addresses
for QBASE and BASEP to be remapped.

Change-Id: I36b0d71c57bfd293672b10c7b85f3b2415e9c839

Change-Id: I68660361c7af062ac76a38f86c118ddc74e1c0d6

Allow the QREAD and STATUS registers to be read using the PMU
interface.

Change-Id: I7e349a0938404011588c1d5eb82b4a5dbc7c27e4

Jonny Svärd authored May 24, 2022 and Kristofer Jonsson committed May 25, 2022

Currently TARGET_CPU should be used to set CPU+features, if
using core_platform provided toolchain files.

Change-Id: I053cc25de12501a2773238820daa150f9ea20fa7

Base address 1 points at the TFLM arena and is by default routed
over AXI 0. For the spilling use case with both model and arena in
DRAM it would make more sense to route base addresses 0 and 1
over AXI 1.

For Ethos-U65 the default settings should correspond to the spilling
use case.

The AXI limits should have different max values depending on the NPU
architecture.

Change-Id: Icd317097e2cfdbfb39886e13c2cb2202651e5357

Jonny Svärd authored Apr 26, 2022 and Kristofer Jonsson committed May 05, 2022

Add reference counted ethosu_request_power(),
ethosu_release_power() functions. While there are
active requests, disable the Q-channel power gating
of the Ethos-U device, leaving the device powered on.
Note that clock gating is implemented to follow the
state of the power gating.

Add ethosu_soft_reset() function. Restore power-
and clock gating state after reset.

Refactor and simplify driver code to use the new
functions.

Change-Id: I9756572c5c3e51b2be244bcea856d88e890e2d40

Changed mutex lock/unlock and semaphore take/give functions to return
an int value instead of void.

Change-Id: I619327b9e14a3c37697617cbe0cba358102bd6a0

- Improve build section by describing new build options
- Add a section about driver APIs and basic usage examples
- Add a section about mutexes and semaphores
- Add a section about begin/end inference callbacks
- Add a brief section about driver implementation design
- Fix markdown title/subtitles structure
- Small fixing of typos and rewording

Also add .gitignore

Change-Id: I7216a2b72b0dfaa605620f4344da205235339ddb

Add an asynchronous API to the driver. The current synchronous API
is now using the new async API internally. The main new functions
are ethosu_invoke_async() and ethosu_wait(). Every successfull call
to ethosu_invoke_async() must be followed by a call to ethosu_wait()
to get the status of the inference. The wait function can be called
in a blocking or non-blocking mode by specifying the `block`
argument to true/false. The regular synchronous invoke function is
implemented as a invoke_async followed by a wait(block=true) call.

Short sommary of changes:
 - Add an internal ethosu_job struct to keep track of
   inference data and job state.
 - Use async API in blocking mode for normal flow
 - Change default semaphore implementation to binary type
 - Move error prints out of interrupt context
 - Move ethosu_inference_begin() callback to right before HW invoke
 - Always call ethosu_inference_end() callback, even in case of errors
 - On NPU error, do not keep NPU powered after being reset

Change-Id: If4c3c46e3c6732a669e17251bd848dea5765a490

Change-Id: I155d79a87f9a9a0dc26c145415cc7cdd19533639

Change-Id: If1bf2aa428bc906f8ba36a011fa3401151ce6b92

Adding user argument parameter to invoke() which is passed on to
the inference_begin() and inference_end() callbacks.

Change-Id: I1372767c3a0dbd963aa395911bda7625bc6d6ee4