Rework cache management

Simplify the cache management by removing most of the logic from the
driver itself to user overridable weak functions for cache flush/clean
and invalidation.

The driver now calls the cache flush/clean before each NPU command
stream with a full list of base pointers/base addresses and their size.
This allows full freedom to implement any desired logic for cache
coherence management outside of the driver. This changes the function
prototype for the flush and invalidate functions.

As there's no longer a need to keep a bitmask of which base
pointers/addresses to flush/clean/invalidate, those functions have been
removed.

To guarantee that the driver works in all cases and doesn't get affected
by potential speculative loads, the cache invalidation call has been
moved to after the NPU has finished.

Due to the backwards incompatible changes to the function prototypes,
the driver version has been bumped to 1.0.0

Change-Id: Ibfd755876842edc911fecebf34fa80c22f287ca4
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>