Further simplification of the disassembler using mnemonics provided by the
decoder.

Further simplification of the disassembler using mnemonics provided by the
decoder.

Further simplification of the disassembler using mnemonics provided by the
decoder.

Further simplification of the disassembler using mnemonics provided by the
decoder. Also, improve consistency of "unallocated" being reported for those
instructions that are undefined.

The decoder provides its users with a string that contains the mnemonic, and the
disassembler already extracts this. Introduce a new function that uses this
mnemonic, and apply it to the simplest disassembly cases.

Where possible, apply the hash-computing user-defined literal ""_h, for clarity
and maintainability.

Replace fixed size arrays with std::vector for static data used by the decoder,
and store const references rather than copies in each decoding node.

Implement a user-defined literal to store existing decoder bit patterns as
binary representations at build time, reducing the amount of static data used.

Introduce a user-defined literal that converts a string into its hash, and use
it to initialises the keys in form-to-visitor maps.

Improve static code/data size by:

 1) Removing the per-instruction visitor functions. The generic Visit()
    function can be overridden instead to intercept individual instructions, as
    shown in the existing custom disassembler example.
 2) Remove the array of instruction forms. Instead infer the forms from the
    decoder tree defined by kDecodeMapping.

As it's now unused, remove the INSTRUCTION_VISITOR_LIST define too.

Atomic instructions were calling the trace logging with the wrong element size,
causing assertion failures when tracing them. Fix this, and add atomic
instructions to the trace tests.

Scalar SIMD operations that write b, h, s or d registers should set the upper
parts of the destination register to zero. Fix the scvtf and ucvtf instructions
and add tests for all SISD instructions.

The MemOperand methods IsPreIndex() and IsPostIndex() checked only the
addressing mode, leaving the source of the index (immediate or register)
ambiguous. Add new versions that explicitly check for an immediate, and update
the code to use them.

Allows testing for the presence of increased precision of
Reciprocal Estimate and Reciprocal Square Root Estimate
from an 8-bit mantissa to a 12-bit mantissa.

Allows querying for the presence of Enhanced Counter Virtualization.

Declaring the form_to_visitor maps as static members caused integration problems
for some users. Instead, use a Singleton-like construction to wrap the map in
a static accessor. Additionally, use unordered_map, as we don't need the
ordered property of map.

Clang reports using bitwise-or where it expects logical-or as a warning.

In the previous change, we added a few filler values so that we were
able to add support for detecting FEAT_AFP, however the necessary
identifiers were already in place to support checking for FEAT_MTE1 and
FEAT_MTE2, so we can fill in those blanks with the necessary identifiers

Allows querying for the existence of FEAT_AFP (alternate floating-point
behavior).

While we're in the same area, we can also fill in the remaining defined
bits.

FlagM2 (bit 39, kAXFlag to VIXL) was missing from the HWCAP feature bits used
for mapping Linux's feature reporting to VIXL. This caused subsequent bits to be
off by one.

GCC 10 sometimes fails on a ternary operator used in the SVE tests. Avoid this
using a conditional.

Rerun the code coverage test and update the record.

The Markdown to HTML generator Github uses appears to want a newline after HTML
in order to recognise Markdown tags. Fix the document and generator to do this.

Fix the additional variable shadowing problems reported by Clang on MacOS.

Make it explicit that contributions to the project are covered by the cited
licence.

Fixes compilation on Debian armel, see
https://buildd.debian.org/status/fetch.php?pkg=vixl&arch=armel&ver=5.1.0-1&stamp=1637517716&raw=0

Previously, Vixl would force hard float on all arm CPUs, by checking
only for __arm__. This would cause GCC to throw an internal error when
compiling with -mfloat-abi=soft. See also this example on Compiler
Explorer: https://compiler-explorer.com/z/zsn5vaMna

Replace COMPARE_PREFIX with COMPARE in disassembler tests where the entire
output string should be tested, and fix an error revealed in the tests.

Add SVE instructions to the document, and include a linked index at the
beginning.

Prompted by https://github.com/Linaro/vixl/pull/9 enabled -Wshadow generally.

Clang 14 (current trunk) warns about the use of a bitwise operation on booleans.

Prevents -Wshadow warnings from appearing in including projects with
-Wshadow enabled.

operands-aarch64.h defines a bunch of vector register convenience
operands via the DEFINE_VREGISTERS preprocessor define, which results in
the b5 convenience operand shadowing this variable

Update the supported architecture feature table to reflect the current code and
enable the I8MM disassembler feature tests.

Change-Id: If412db4a3b0121f0626c102e4b40c21629ede8c1

Disable linter for calls to regex_match, as this causes failures for the version
of clang-tidy used in the Mac CI.

Re-generate tools/code_coverage.log as the record is too old.

Remove more switch/case constructions from the disassembler when the change to
using the decoder's provided instruction forms makes the code simpler.

Share the mapping from instruction to handler in the simulator and CPU features
auditor, removing a lot of duplicated initialisation.