- Added release information
 - Modified SUPPORTED_OPS.md version info

Change-Id: I3ead55db45c84821c426645e488dfb765166d20f
Signed-off-by: Tim Hall <tim.hall@arm.com>

 - Updated TensorFlow Support section

Change-Id: Ic2551f44e7dfa996a5dcc8840d480b7985415a0a
Signed-off-by: Tim Hall <tim.hall@arm.com>

 - Changed homepage link from cgit to gittiles
 - Clarified tensor alignment is in Bytes

Change-Id: I9fd912c17d61f9add11493e031bbb620271c68eb
Signed-off-by: Tim Hall <tim.hall@arm.com>

 - Changed deprecated method of getting package version info
 - Updated pylint version to be Python 3.11 compatible

Change-Id: I68aae2155098c834653d404c78acf8df86eb88f8
Signed-off-by: Tim Hall <tim.hall@arm.com>

 - Updated example to --cpu-tensor-alignment in OPTIONS.md

Change-Id: Id0b74a9aac4dd4384a4b7c74eea743c29c3c8e5e
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

 - Added missing constraint message for stride height by
adding the constraint_stride_width_no_upper_limit to AVERAGE_POOL_2D

Change-Id: Ib716fb19e44cb8735b52270b557998d4cbf5cb1c
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

 - Added semantic checks for Transpose
 - Added unit tests for semantic checks
 - Updated SUPPORTED_OPS.md

Change-Id: I3fcf13120f4b6811f8de27711996cdb9c19c9847
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

 - Added graph optimiser function to convert TRANSPOSE op
into an AvgPool op with swapped stride for height and width
 - Added TRANSPOSE supported op check
 - Added unit tests for TRANSPOSE supported op check
 - Updated SUPPORTED_OPS.md
 - Fixed problem in pass packing when optimizing the pass list.
Old problem, but now seen when moving TRANSPOSE from cpu.

Change-Id: I0a0ef420b0fb8241090c2e2434622881105cde15
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

- When adding extended stride support for CONV_2D a
regression was introduced for AvgPool causing an
output diff for a particular test case.
- The reason was that the logic for forcing the
zero point to zero when generating the cmd stream
did not have a check for explicit padding.
- Updated logic to also include check for explicit
padding.

Change-Id: Iee4893a83a05279e592fe230f4d66d9c9ddb3e05
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

The constraint check for the IFM/IFM2/OFM strides were coded
according to an incorrect version of the specification.

Changed the check to verify that the strides are a multiple
of 16 bytes. Also changed the wording in the exception message
to clarify if it is a stride or value violating the constraint.

Test case had two stride settings violating the constraint,
after this change one of them still fails the check, so
no change to tests, except in comments clarifying what is
being tested.

Change-Id: I93815d8bb08303b5f747c947c0bbd461b12895e3
Signed-off-by: Björn Davidsson <bjoern.davidsson@arm.com>

- A reshape followed by an activation function was converted
to a Memcpy with fused activation. The problem is that Memcpy
does not support activation so no activation was executed.

- Added logic to prevent activation functions to be fused
with the Memcpy.

Change-Id: Ibc7d985e5037146dd1f6cb2601407d0f8b865ac6
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

- Added support for stride_h > 3 when ofm height is 1
- Added support for stride_w > 3 when ofm width is 1
- Updated constraints
- Updated tests
- Updated SUPPORTED_OPS.md

Change-Id: I8f89909b05a0f052df5f03702966cee50da61cfc
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

Update max_outstanding_kernels to 2 and remove unit tests expecting
values of 2 or 3.

Change-Id: Ib8a3a88d3378d3ce84427935c91c7a46f04bc9ab
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>

- Update to TensorFlow 2.14 and minimum required Python version to 3.9.
- Update version pins on NumPy and FlatBuffers.
- Add constraint to Offset attribute of StridedSlice operator

Change-Id: I8c7122def963202e5f47e92b62be607935ed05cf
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>

The operator mapping for the RANDOM_UNIFORM operator was missing the
seed and seed 2 options which resulted in those options being removed
when the operator was passed through Vela.

Change-Id: I8469c239ec1d20d775c31a52e4954baf159643f2
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>

Johan Gunnarsson authored Sep 26, 2023 and Fredrik Svedberg committed Oct 05, 2023

Markdown's git reporitory has moved to different location.

Change-Id: Iae401c1d283d937347cbce546836470647333201
Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>

- Fixed a regression where DepthWiseConv used in argmax int64
had the wrong shape.

- The error was introduced when adding support for a new operator
that changed the weight shape for the cast utility function. That
change only worked because reorder_depthwise_weights was called
later. Since argmax is converted after reorder_depthwise_weights
the cast operator in argmax got the wrong shape.

- The fix is to set the correct weight shape in the cast operator
and then mark that the weights already have been transposed correctly.

Change-Id: I61f5694f078cfcaf0d46d43faead6eb7e0a23ade
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

William Isaksson authored Sep 15, 2023 and Rickard Bolin committed Sep 18, 2023

Update to 23.1.21

Change-Id: I2a9aaa7cbb725c2f417b87577a1f8d6ad4697d76
Signed-off-by: William Isaksson <william.isaksson@arm.com>

- Added SQUARED_DIFFERENCE support
- Updated SUPPORTED_OPS.md

Change-Id: Id83d9d92129e645390c7979759dfdeff7a14c2ee
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

Johan Gunnarsson authored Sep 07, 2023 and Johan Alfvén committed Sep 14, 2023

Only set stride to (1, 1) if kernel, stride and IFM shape all are
equal. And also set padding to VALID to handle ops with SAME padding.

Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
Change-Id: Id3cc34686f09667ea21541fac432351555344e3d

Johan Gunnarsson authored Sep 07, 2023 and Johan Alfvén committed Sep 14, 2023

This fixup is not relevant for Resize ops.

Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
Change-Id: I81b9d3c8a6dd820b1e5d747d754100282b93c641

William Isaksson authored Sep 11, 2023 and Rickard Bolin committed Sep 13, 2023

- Adds 3 ops: Bitcast, BitcastXor, RightShift

Change-Id: Ia9721c69d4f3da0deba7526addb95a9a54e63adf
Signed-off-by: William Isaksson <william.isaksson@arm.com>

- Support for stride WxH 1x1
- Support for stride WxH 2x1 when IFM and KERNEL
  is 1D shape with height 1
- Added test to supported operators
- Updated SUPPORTED_OPS.md

Change-Id: Ic1abead8399a5e14a78d962f8aded0d3b3dbfcc4
Signed-off-by: Johan Alfven <johan.alfven@arm.com&gt;X>

Extend the error message of RecursionError when reaching default
recursion depth with instructions to use the "--recursion-limit"
option in Vela.

Change-Id: I5c92d49b99203268c4b988f421afe7013ac3511a
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>

Johan Gunnarsson authored Aug 29, 2023 and Fredrik Svedberg committed Sep 05, 2023

There are networks out there with Pool ops with filter (W, H) equals
IFM (W, H) equals stride (W, H). The stride is technically too large
for the NPU, but we can actually run these ops in the NPU since the
filter is large enough the window doesn't slide. To support these ops
we need to fix the stride so later checks don't put this op on CPU.

Change-Id: I8f0a46b26fb94ee76c33748589536cc5ba07ea59
Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>

This convert is already done in the pass packing stage, but doing it
in the graph optimiser stage is better.

Change-Id: Ib9baa98d115cf88491ce39936972a93467a378ce
Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>

- If a npu op is followed by a convolution op than runs on the cpu,
the optimized file ends up containing a duplicated tensor called _cpu.
Functionality wise not a problem but the graph will look strange in a
graph viewer.

- This error was introduced when removing duplicate weights
tensors but the above use case was not considered in that patch.

- The fix is to make sure that only the weight and bias tensor are
modified.

Change-Id: I576f13650f1f9d3d50a421ab7100fc8b5ab62657
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

Rob Elliott authored Aug 17, 2023 and Rickard Bolin committed Aug 21, 2023

 * Using serialization_lib main branch to update statically copied
   files sha 5f920211ac23393a7b98a0d358bfbfc3232d5c8f (v0.80.0)
 * All files within the ethosu/vela/tosa are copied from that revision
 * Note: hope to move to serialization_lib as a pip module in future

 * Modified the ethosu/vela/{tosa_mapping,tosa_reader}.py to use
   v0.80.0 TOSA FlatBuffers implementation
 * These are the additional changes made to support this new version,
   with changes in the format of the FlatBuffers file and where various
   values are stored. Either changing from input to attribute, or
   moving to different attributes.

Signed-off-by: Rob Elliott <robert.elliott@arm.com>
Change-Id: I5e1fcc2a9964148619be3477adf1e88e84cbae2d

- Added release information
- Modified SUPPORTED_OPS.md version info
- Update README.md and classifiers in pyproject.toml to specify Python
  3.10 as recommended and tested version

Change-Id: I78e5752846f261d4713b89c8efe447bcb9c095dd
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>

- RSQRT is only defined for positive numbers and
therefore the zeropoint and actual input value
will have an impact

- Clamp the range to avoid crashing. As long as the actual
input is within valid range everything works. If the input
is not valid the reference will crash and not generating
any output

Change-Id: I1082b508d9cd85ad4b017e7b786cfff730585172
Signed-off-by: Johan Alfven <johan.alfven@arm.com>

- now only converts array directly if ndim==0

Signed-off-by: William Isaksson <william.isaksson@arm.com>
Change-Id: Id23e419bc7dd717f9694013180d4609819fd2f56

William Isaksson authored Jul 12, 2023 and Rickard Bolin committed Aug 09, 2023

- npu_performance now uses write/read shapes instead of using ifm/ofms
for memory cycle estimations.

- also fixes a would be bug in the tflite_graph_optimiser, where one
read shape is not Shape4D.

Change-Id: I2067069a713d2cf9e65a5cc227e803de79940fff
Signed-off-by: William Isaksson <william.isaksson@arm.com>

Johan Gunnarsson authored Aug 04, 2023 and Rickard Bolin committed Aug 09, 2023

PAD input tensor shape plus paddings must equal output tensor shape.

Change-Id: Icc5dea9bf6a8f6e1c8402f4d9af4d9796e8ef1aa
Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>

 - Documented High-Level and register-Level command stream options
 - Changed High-Level command stream display to show the name of the
command
 - Fixed an issue with some operators not being displayed by the
CLI option --verbose-operators
 - Changed an unneeded print in pass packing to a more useful assertion

Change-Id: I9d53f19f4e32d0478209bc964724c27c935f66d6
Signed-off-by: Tim Hall <tim.hall@arm.com>

 - Added Python support information
 - Clarified TensorFlow support information
 - Updated Requires-Python version to 3.8

Change-Id: Iab38a2f4480e58a1bd36d5055342c4bf7379dd09
Signed-off-by: Tim Hall <tim.hall@arm.com>

William Isaksson authored Aug 02, 2023 and Rickard Bolin committed Aug 07, 2023

We now don't rewrite tensors if the tensor is already an output tensor of the current subgraph

Signed-off-by: William Isaksson <william.isaksson@arm.com>
Change-Id: I9cb36d830616a69d35180326437ff53bcaa62d71

William Isaksson authored Jul 03, 2023 and Tim Hall committed Aug 04, 2023

Adds Vela version to description and metadata

Change-Id: I75fccd1a05a396612a249b8ec1662d8cae940ee6
Signed-off-by: William Isaksson <william.isaksson@arm.com>

William Isaksson authored Jul 25, 2023 and Fredrik Svedberg committed Jul 31, 2023

- Added support for multiple npu subgraphs to have the same cpu output tensor

Change-Id: I2e787306dd64af9b03cdf2bacb4c9ff7119f6c49
Signed-off-by: William Isaksson <william.isaksson@arm.com>

William Isaksson authored May 03, 2023 and Fredrik Svedberg committed Jul 31, 2023

Performance estimation now uses the parent_tensor mem_area instead of
the scheduler_op mem_area, because the mem_area is only set on the
parent_tensor by the scheduler.

Signed-off-by: wilisa01 <william.isaksson@arm.com>
Change-Id: I11f73686bfbd6958a8920c5e264a5f95cc3f23d1

William Isaksson authored Jun 19, 2023 and Fredrik Svedberg committed Jul 31, 2023

- checks that cmd1 payloads are legal in
  register_command_stream_generator,
- adds unit tests

Change-Id: I2bc23147f60fe090c71703f08d9cbaa279fac86e
Signed-off-by: William Isaksson <william.isaksson@arm.com>