Commits · a375ff8e14bea0a5cbfff99d6456aa8d9a3320ab · Arm Reference Solutions / u-boot

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May 18, 2017

Merge branch 'master' of git://www.denx.de/git/u-boot-imx · a375ff8e
Tom Rini authored May 18, 2017

a375ff8e
Merge branch 'master' of git://git.denx.de/u-boot-socfpga · 753a4dde
Tom Rini authored May 18, 2017

753a4dde
Merge branch 'master' of git://git.denx.de/u-boot-usb · a0bdf7b3
Tom Rini authored May 18, 2017

a0bdf7b3

ARM: dts: am335x-evm: disable mmc3 · ad99abe8

Jean-Jacques Hiblot authored May 17, 2017



SDIO is not supported in u-boot, there is no point in enabling mmc3.
For this purpose, add u-boot specific dtsi that this will be included
automatically while building the dtb.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

ad99abe8

scripts/Makefile.lib: Always have ...-u-boot.dtsi be able to override · 7452946e

Tom Rini authored May 17, 2017

The intention of having a -u-boot.dtsi file is to be able to make
changes to the provided upstream dts files as well as to be able to add
nodes.  Change the logic for adding the file from making it the last
included file at the top of the dts to being included at the end of the
file.

Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

7452946e

Merge branch 'master' of git://git.denx.de/u-boot-imx · 5c84ad09
Stefano Babic authored May 18, 2017
```
Signed-off-by: Stefano Babic <sbabic@denx.de>
```
5c84ad09

arm: socfpga: Enable build for Arria 10 · d89e979c

Ley Foon Tan authored Apr 26, 2017



Update Kconfig and Makefile to enable Arria 10.
Clean up Makefile and sorting *.o alphanumerically.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

d89e979c

arm: socfpga: Add board files for the Arria10 · 9b21de78

Ley Foon Tan authored Apr 26, 2017



Add support for the Arria10 SoCDK.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

9b21de78

arm: socfpga: Add config and defconfig for Arria 10 · 1b259403

Ley Foon Tan authored Apr 26, 2017



Add config and defconfig for the Arria10 and update socfpga_common.h.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

1b259403

arm: socfpga: Add SPL support for Arria 10 · 8f4c80c4

Ley Foon Tan authored Apr 26, 2017



Add SPL support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

8f4c80c4

arm: dts: Add dts and dtsi for Arria 10 · 3d5f7c5a

Ley Foon Tan authored Apr 26, 2017



Device tree files for Arria 10

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

3d5f7c5a

arm: socfpga: Add misc support for Arria 10 · 35b9800f

Ley Foon Tan authored Apr 26, 2017



Add misc support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

35b9800f

arm: socfpga: Add pinmux for Arria 10 · caf36e1e

Ley Foon Tan authored Apr 26, 2017



Add pinmux support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

caf36e1e

arm: socfpga: Add sdram header file for Arria 10 · c887d480

Ley Foon Tan authored Apr 26, 2017



Add sdram header file for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

c887d480

arm: socfpga: Add system manager for Arria 10 · 86f032e6

Ley Foon Tan authored Apr 26, 2017



Add system manager register struct and macros for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

86f032e6

arm: socfpga: Add clock driver for Arria 10 · 177ba1f9

Ley Foon Tan authored Apr 26, 2017



Add clock driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

177ba1f9

arm: socfpga: Add reset driver support for Arria 10 · 827e6a7e

Ley Foon Tan authored Apr 26, 2017



Add reset driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

827e6a7e

arm: socfpga: Add A10 macros · d83b8193

Ley Foon Tan authored Apr 26, 2017



Add i2c, timer and other A10 macros.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

d83b8193

arm: socfpga: Restructure misc driver · d1c559af

Ley Foon Tan authored Apr 26, 2017



Restructure misc driver in the preparation to support A10.
Move the Gen5 specific code to gen5 file.

Change all uint32_t_to u32.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

d1c559af

arm: socfpga: Restructure system manager · 4ddd541d

Ley Foon Tan authored Apr 26, 2017



Restructure system manager in the preparation to support A10.
No functional change.

Change uint32_t to u32.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

4ddd541d

arm: socfpga: Restructure reset manager driver · 2b09ea48

Ley Foon Tan authored Apr 26, 2017



Restructure reset manager driver in the preparation to support A10.
Move the Gen5 specific code to gen5 files.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

2b09ea48

arm: socfpga: Restructure clock manager driver · de778115

Ley Foon Tan authored Apr 26, 2017



Restructure clock manager driver in the preparation to support A10.
Move the Gen5 specific code to _gen5 files.

- Change all uint32_t to u32 and change to use macro BIT(n) for bit shift.
- Check return value from wait_for_bit(). So change return type to int for
  cm_write_with_phase() and cm_basic_init().

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

de778115

usb: lpc32xx: add i2c DM support · 9ad69f0b

Liam Beguin authored May 17, 2017



Add DM support for i2c functions.

Signed-off-by: Liam Beguin <lbeguin@tycoint.com>
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Reviewed-by: Marek Vasut <marex@denx.de>

9ad69f0b

pinctrl: imx: fix memory leak · c1d1e9d6

Peng Fan authored May 11, 2017



Each time set_state is called, a new piece memory will
be allocated for pin_data, but not freed, this will
incur memory leak.

When error, the devm API could not free memory automatically.
So need call devm_kfree when error.

Issue reported by Coverity

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Agner <stefan.agner@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>

c1d1e9d6

imx: mx7dsabresd: fix secure config after switching to DM · 8ae5bb37

Stefano Babic authored May 18, 2017



mx7dsabresd_secure_defconfig was not updated after moving to DM.

Signed-off-by: Stefano Babic <sbabic@denx.de>

8ae5bb37

imx: mx7dsabresd: switch to DM USB · d1e204b5
Peng Fan authored Apr 13, 2017
```
Switch to use DM USB.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
```
d1e204b5

imx: mx7dsabresd: reset ENET_RST_B · 709fef51