Clearing SIMD registers with XOR's performs better
than using vzeroall.

Fix for issue where NULL lane pointers are not updated
before processing the final block during flush operation.
Similar to CMAC fix in previous commit.

If message length to hash is a non multiple of 16 bytes, the final
block must be padded. For this reason, the final block is processed
separately to the rest of the buffer. During the flush operation,
NULL job input pointers are not updated to point to a valid address
before processing a 'good job' final block which may lead to illegal
memory access.

In the Chacha20 implementation, cipher keys are
loaded in SIMD registers, which might get stored
in stack frames in later stages. To avoid this,
these registers are cleared after the encryption is performed.

- Added AES-ECB to man page recommendations
- Minor fix in README recommendations table

Now that there is an SSE and an AVX implementation,
there is no need to have an scalar implementation for Chacha20.

- always randomize common buffers
- randomize or fill cipher key, authentication key and test buffer
- don't copy 32 bytes of cipher key chacha20
  - memcpy() leaves trace of data on the stack
  - doing 2 x memcpy() of 16 bytes instead