For older FVPs (without support for RME extension) the top 16MB of
DRAM1 is reserved as Trusted DRAM. However, the latest FVP Base RevC
AEM Model [1] has support for RME extension. When RME extension is
present the top 64MB of DRAM1 (i.e. at the top of the 32bit address
space) is carved out for four-world support in TF-A [2].

Therefore, reduce the System Memory size by 64MB.

Reference:
[1] FVP Base RevC AEM Model (available on x86_64 / Arm64 Linux)
(https://developer.arm.com/Tools%20and%20Software/
Fixed%20Virtual%20Platforms)

[2] commit c872072 (https://review.trustedfirmware.org/plugins/gitiles/


TF-A/trusted-firmware-a/+/c8720729726faffc39ec64f3a02440a48c8c305a))

Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>

Add maintainer and reviewer of ManageabilityPkg.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Abdul Lateef Attar <abdattar@amd.com>

Add Ipmi Protocol/Ppi/SMM modules to ManageabilityPkg.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>

Add Ipmi Protocol/Ppi/SMM implementations.
The underlying implementation of transport
interface depends on the binded
ManageabilityTransportLib.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>

This is the KCS manageability transport library
instance follows the design guidance described
in Readme file under ManageabilityPkg.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>

The helper functions library facilitates reducing
duplicated code in the manageability transport
library instances.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>

The NULL instance of ManageabilityTransportLib
library.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>

Add ManageabilityTransportLib header file to package.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>

Initial commit of ManageabilityPkg

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

Add Readme file of edk2 platform ManageabilityPkg.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>
Reviewed-by: Abdul Lateef Attar <abdattar@amd.com>

This change helps to update the following:
- Add logic to get SubNUMA node region for Ampere silicons
  (Altra and Altra Max processor) as a common API in AmpereCpuLibCommon.
- Leverage the added API of AmpereCpuLibCommon accordingly.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

This updates the platform specific PCIe modules to
add support for Ampere Altra Max processor which
features 128 PCIe Gen4 lanes (distributed across
eight x16 RCAs) using 32 controllers.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

This adds PHY preset NVParams definition for each Root complex
to support Ampere Altra Max platform.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

This updates the number of cores and clusters to add support
for the Ampere Altra Max processor.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

This patch updates the following:
- Check End Point configuration space is accessible or
  not before getting its capability.
- Add new function to check PCIe card is present or not.
- Set CRS (Configuration Request Retry Status) to follow
  PCIe specifications.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

According to PCIe specification, following exit from a Conventional Reset,
some devices may require additional time before they are able to respond
to Requests they receive, so this patch adds a delay after releasing the
PERST signal.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

This fixes the memory attribute of the first
RC Type B (RCB0).

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

This adds ACPI DSDT tables and updates ACPI MADT table
to support Ampere Altra Max processor.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

This corrects the high devmap of Root Complex (RC)
that should be fetched from a high bifurcation.

Signed-off-by: Nhi Pham <nhi@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

It is required to reinitialize DataSize variable before subsequent
IpmiSendCommand calls. It is especially required after processing
IpmiSendCommand with IPMI_GET_BMC_EXECUTION_CONTEXT because it returns
only 2 bytes as a response. So to the next call of IpmiSendCommand with
IPMI_APP_GET_DEVICE_ID DataSize=2 will be passed. Probably this call will
fail because the expected size of returned data either 12 or 16 bytes
depending on IPMI version supported.

Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
Cc: Arunk <arunk@ami.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

- Use OS specific path seperator instead of hardcoding ';'
- Fix case of build artifact FV/PLATFORMPAYLOAD.Fv

Test:
python Features/Intel/PlatformPayloadFeaturePkg/PlatformPayloadFeaturePkg.py
works on Linux.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4358



Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

Add package that are required to build PlatformPayloadFeaturePkg.

Test:
Running python Features/Intel/PlatformPayloadFeaturePkg/PlatformPayloadFeaturePkg.py
generates a FV.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4359



Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

Some toolchains have stack protection enabled by default, so without the
appropriate library included the build will fail with missing symbols
during link.

Mail thread with reviews: https://edk2.groups.io/g/devel/message/100746



Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: devel@edk2.groups.io
Reviewed-by: Chao Li <lichao@loongson.cn>
Reviewed-by: Xianglai Li <lixianglai@loongson.cn>
Signed-off-by: WANG Xuerui <git@xen0n.name>

MpServicesTest was dropped in favor of EfiMpServiceProtocolShellUnitTest.
Update the dsc file accordingly.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>

Use predefined type while accessing IPMI command returned data
instead of raw byte array.

Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

There is no point to have temporary buffer in BMC instance data
used only for synchronous IPMI command as a transfer buffer.
Using local variables make things much simpler.

Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

Byte 0 of a response contains completion code for the command.
So, the examined data starts from byte 1. It's easy to make a mistake
here since specification counts response data from 1.

For the "Get Self Test Results" command Intelligent Platform Management
Interface Specification v2.0 rev 1.1 paragraph 20.4 defines response as:
+-----+---------------------------------------------------------------+
|byte | data field                                                    |
+-----+---------------------------------------------------------------+
| 1   | Completion Code                                               |
|     |                                                               |
| 2   | 55h =  No error. All Self Tests Passed.                       |
|     | 56h = Self Test function not implemented in this controller.  |
|     | 57h = Corrupted or inaccessible data or devices               |
|     | 58h = Fatal hardware error                                    |
|     |                                                               |
| 3   | For byte 2 = 55h, 56h, FFh: 00h                               |
|     | For byte 2 = 58h, all other: Device-specific                  |
|     | For byte 2 = 57h: self-test error bitfield.                   |
+-----+---------------------------------------------------------------+

Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com>
Cc: Isaac Oram <Isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Isaac Oram <Isaac.w.oram@intel.com>

Since AlderLake platform client project align Server project to use
PC00.

Signed-off-by: Aryeh Chen <aryeh.chen@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

Signed-off-by: Graeme Gregory <graeme@xora.org.uk>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

There have been reports[1] of failures to boot due to unicode collation
protocols not being available at Ext4Dxe load time. Therefore, attempt
to initialize unicode collation at Start() time, like done previously in
FatPkg/EnhancedFatDxe. By doing so, we move collation initialization
to BDS, where the module responsible for protocol installation should
have already been loaded and ran.

[1]: https://edk2.groups.io/g/devel/message/100312



Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Marvin Häuser <mhaeuser@posteo.de>
Fixes: d9ceedca ("Ext4Pkg: Add Ext4Dxe driver.")
Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Marvin Häuser <mhaeuser@posteo.de>

The current SPCR table revision is 2. Instead of using a hard-coded
value, use the symbolic constant
EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION.

Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>

ACPI 6.0 introduced support for ASL 2.0 includes standard operators.
Convert the DSDT from legacy to ASL 2.0 syntax.

Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>

If PcdArmArchTimerFreqInHz is zero, the value of the timer frequency
will be read from CNTFRQ_EL0. Avoid hard-coding the value in ArmJuno.dsc
and instead let the ArmArchTimerLib driver read it from the SoC.

Signed-off-by: Rebecca Cran <rebecca@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>

The MetronomeDxe driver uses the PCD PcdMetronomeTickPeriod to calculate
how many ticks to wait in MicroSecondDelay. Given that the timer clock
on Juno runs at 50 MHz, it ticks every 20 ns; therefore, a setting of
1000 is wrong: for example it causes a call to gBS->Stall (1) to take
10 us.

The driver in MdeModulePkg/Universal/Metronome assumes the clock ticks
at least every 100 ns, which is the minimum allowed by the Metronome
protocol. Since that's the case on Juno, switch from
EmbeddedPkg/MetronomeDxe to MdeModulePkg/Universal/Metronome.

Signed-off-by: Rebecca Cran <rebecca@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>

The SymlinkTmp was deallocated unconditionally, so we shouldn't free it
again on EFI_ERROR

Cc: Marvin Häuser <mhaeuser@posteo.de>
Cc: Pedro Falcato <pedro.falcato@gmail.com>
Cc: Vitaly Cheptsov <vit9696@protonmail.com>
Fixes: e81432fb ("Ext4Pkg: Add symbolic links support")
Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
Reviewed-by: Marvin Häuser <mhaeuser@posteo.de>
Reviewed-by: Pedro Falcato <pedro.falcato@gmail.com>

The ARM memory region types with the NONSECURE qualification should only
be used in places where this makes a difference, i.e., in the secure
world. The Marvell firmware generally runs at EL2, which is non-secure
only (in ARM v8.0) so the NONSECURE marking is unnecessary here, and
should be dropped.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

BeagleBoard is the only user of the so-called 'PE/COFF protocol', which
just exposes the PE/COFF loader library API via a protocol, presumably
to avoid duplicating this code in the PrePi SEC component as well as the
DXE core.

This is a rather questionable practice, and it would be better to drop
this code so we can remove it from the EDK2 main repo as well.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

Updates the Standalone MM module to have the necessary INF changes
to build with the following two recent commits made to rewrite the
the variable store header in the MM SPI FVB service.

  - e95c7988
  - 88d44c56

Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

Fix the compilation description error in the Readme file.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>