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Commit ae4b17a6 authored by Gian Marco Iodice's avatar Gian Marco Iodice Committed by Viet-Hoa Do
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Matmul int4 micro-kernels for QAI8DX (LHS) x QSI4C32 (RHS) -> F32



- The LHS matrix is Quantized (Q) Asymmetric (A) Signed 8-bit (I8) with per-row
(DX) quantization parameters
- The RHS matrix is quantized (Q) Symmetric (S) Signed 4-bit (I4) with
per-block quantization
- The destination is F32
- Implement micro-kernels to perform the matrix multiplication
- Implement a micro-kernel to pack the RHS matrix

Signed-off-by: Gian Marco Iodice's avatarGian Marco Iodice <gianmarco.iodice@arm.com>

Signed-off-by: Anitha Raj's avatarAnitha Raj <anitha.raj@arm.com>

Signed-off-by: Viet-Hoa Do's avatarViet-Hoa Do <viet-hoa.do@arm.com>

Reviewed-by: Viet-Hoa Do's avatarViet-Hoa Do <viet-hoa.do@arm.com>
Reviewed-by: Anitha Raj's avatarAnitha Raj <anitha.raj@arm.com>
Reviewed-by: Felix Johnny Thomasmathibalan's avatarFelix Johnny Thomasmathibalan <felixjohnny.thomasmathibalan@arm.com>
Reviewed-by: Jakub Sujak's avatarJakub Sujak <jakub.sujak@arm.com>
Reviewed-by: Max Ren's avatarMax Ren <maxren@meta.com>
Approved-by: Viet-Hoa Do's avatarViet-Hoa Do <viet-hoa.do@arm.com>
parent ff68b50b
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