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  1. Jun 16, 2020
  2. Jun 15, 2020
    • Balint Matyi's avatar
      Boot: Fix BL2 and NS scatter files · ce8d38a8
      Balint Matyi authored and Tamas Ban's avatar Tamas Ban committed
      
      
      The maximum size of the region ER_DATA in BL2 scatter files is set to
      BL2_DATA_SIZE, which is usually equal to the size of the available RAM.
      But the BOOT_DATA, the heap and the MSP stack also have to be placed
      into RAM. In addition, if the TFM_MULTI_CORE_TOPOLOGY macro is set then
      the BOOT_DATA is not placed at the start of the RAM in TF-M, but after
      unprivileged data.
      
      In the case of NS scatter files, NS_DATA_SIZE is usually set to half of
      the available RAM, or the size of the RAM, minus the size of the S
      image. Nevertheless, the stack and the heap still have to fit in the
      ER_DATA region.
      
      So the scatter files are modified like in tfm_common_s.sct, adjusting
      the size of the ER_DATA region.
      
      Signed-off-by: default avatarBalint Matyi <Balint.Matyi@arm.com>
      Change-Id: I8deafe4c3846c5f1615b5842c6d65d9d5bb7c4a0
      ce8d38a8
    • Ludovic Barre's avatar
      Config: Add stm targets in single entry point · 8a77bdde
      Ludovic Barre authored and Tamas Ban's avatar Tamas Ban committed
      
      
      This patch allows to group all stm targets in single cmake entry point.
      The stm TARGET_PLATFORM should prefix by "STM".
      stm platforms supports CoreIPC, CoreIPCTfmLevel2 and RegressionIPCTfmLevel2
      Build with GNUARM toolchain.
      
      Change-Id: I6535420b2304c18f2ab260620c38fef632eb7488
      Signed-off-by: default avatarLudovic Barre <ludovic.barre@st.com>
      Signed-off-by: default avatarMichel Jaouen <michel.jaouen@st.com>
      8a77bdde
    • Michel Jaouen's avatar
      Platform: Add the support of stm32l5xx · 27c87b0c
      Michel Jaouen authored and Tamas Ban's avatar Tamas Ban committed
      
      
      - nucleo_l552ze_q and disco_l562qe boards supported
      and build with gnuarm compiler.
      - dummy driver for nvm counter,
      - mcuboot config overwrite only and 2 images,
      - timer not supported
      - icache ip not activated
      
      Change-Id: I6c87662ae26fc6552e0b65f35000cfc73735fd21
      Signed-off-by: default avatarMichel Jaouen <michel.jaouen@st.com>
      27c87b0c
    • Summer Qin's avatar
      Core: Simplify the service lookup procedure · 2fca1c83
      Summer Qin authored
      
      
      There are only IPC partitions under IPC model now. Enumerate from
      the service list start directly instead of partition list.
      
      Change-Id: I000cd0a06a75ee873462fd6fda271f19af950819
      Signed-off-by: default avatarSummer Qin <summer.qin@arm.com>
      2fca1c83
    • TTornblom's avatar
      Core: IAR fix for 94d424a5 · 44e6561f
      TTornblom authored
      
      
      Removed conditional on __GNUC__. This code needs to be compiled with all
      toolchains.
      
      Signed-off-by: default avatarTTornblom <thomas.tornblom@iar.com>
      Change-Id: I0a5d5213704e4cb2f1a905cefde7c0d53f1d3e4e
      44e6561f
    • Ken Liu's avatar
      Platform: Update including path for CC312 building · e5d8b48c
      Ken Liu authored
      
      
      Update the including path for CC312 building after folder
      structure adjustment.
      
      Change-Id: Ia444acac19df280be35d42e6345f51059d474c59
      Signed-off-by: default avatarKen Liu <ken.liu@arm.com>
      e5d8b48c
  3. Jun 12, 2020
  4. Jun 11, 2020
  5. Jun 10, 2020
  6. Jun 09, 2020
    • TTornblom's avatar
      Build: Minor IAR warnings elimination and fix for 8f17a711 · ae979886
      TTornblom authored
      
      
      Update the IAR CMSE_FLAG handling for 8f17a711
      
      Fixed a few warnings about unused variables with IAR
      
      Disabled some harmless warnings for IAR
      
      Signed-off-by: default avatarTTornblom <thomas.tornblom@iar.com>
      Change-Id: I7197ae009e3e85bcb8d8b21b7528108d966ee330
      ae979886
    • Soby Mathew's avatar
      crypto: decouple the PSA Crypto interface from TF-M flags · d7b79f2c
      Soby Mathew authored
      
      
      This patch cleanup the PSA Crypto interface headers files and
      decouples it from TF-M build flag dependencies. The
      `psa_key_attributes_t` struct definition previously depended
      on various config options. The struct now only has fields
      which can be set and read by the client. Hence the client
      view of the structure is now defined separately in the
      crypto_client_struct.h header.
      
      The platform dependant definitions of the PSA Crypto types
      are fixed and hence the crypto_platform.h header is removed
      and the contents are moved to other PSA crypto headers.
      
      The previous intermediate solution for hiding the type
      differences between crypto server and client view via
      `psa_client_core_key_attributes_t` is now removed.
      
      Change-Id: I2644b5a2da3babe561c569ebf5690b3daa576a12
      Signed-off-by: Soby Mathew's avatarSoby Mathew <soby.mathew@arm.com>
      d7b79f2c
  7. Jun 08, 2020
  8. Jun 05, 2020
  9. Jun 04, 2020
  10. Jun 03, 2020
    • Ken Liu's avatar
      Build: Follow the 'source_structure.rst' · 1f345b0d
      Ken Liu authored
      
      
      This is the first patch to follow the first commit of source structure
      document. The items under the 'secure_fw' folder are re-organized:
      
      - Create/Move some folders/files to follow document.
      - Rename some folders to foll, for example, 'secure_fw/services' to
        'secure_fw/partitions'.
      - Update affected files to make it work.
      
      This is a big change, to make the structure meet the basic shape of
      the structure document defined, and make it easier to be understood
      for users. Staging changes are not applicable so they are combined
      into one - and because it is not the final shape yet, so:
      
      - Upcoming updates on the 'secure_fw' folder would follow up soon.
      - Fine-tune about the 'source_structure.rst' would come, too.
      
      Change-Id: I5c11175e0a4579cd9b42d3e3519dbffb87334d0b
      Signed-off-by: default avatarKen Liu <ken.liu@arm.com>
      1f345b0d
  11. Jun 02, 2020
    • Balint Matyi's avatar
      Platform: Disallow repeated provisioning on Musca-S1 · b157dca4
      Balint Matyi authored and Tamas Ban's avatar Tamas Ban committed
      
      
      The Musca-S1 does not have a real OTP, so its crypto hardware values
      are saved to MRAM instead.
      Before, the life-cycle state was only checked on the S1 from the MRAM
      once provisioning was already done. This resulted in being able to run
      provisioning repeatedly. Change this so that the values in the MRAM are
      used always, so that one needs to wipe the MRAM to repeat the process.
      Also, update the relevant docs.
      
      Signed-off-by: default avatarBalint Matyi <Balint.Matyi@arm.com>
      Change-Id: I51d36b6b453ccfd1770955a4fe3f5f6fdfd70cf0
      b157dca4
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