* changes:
  build(npm): mandate Node.js engine version
  docs(changelog): fix broken version bumping
  docs(changelog): fix version tag links
  refactor(hooks): replace cz-conventional-changelog with cz-commitlint
  style(commitlint): reorder header/body max line length fields
  chore(npm): update package versions/license

ocram.h should be in platform includes group.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I43b6a279e48e1a173f8e7c601f2c8d48e6efc647

* changes:
  refactor(renesas): disable CRYPTO_SUPPORT option
  refactor(fvp): avoid Measured-Boot dependency on Trusted-Boot
  refactor(measured-boot): avoid Measured-Boot dependency on Trusted-Boot
  build: introduce CRYPTO_SUPPORT build option

* changes:
  feat(stm32mp1): add helper to enable high speed mode in low voltage
  refactor(stm32mp1): add helpers for IO compensation cells
  feat(stm32mp1): use clk_enable/disable functions
  feat(stm32mp1): add timeout in IO compensation

This change mandates a particular version of Node.js when running
`npm install`. When using a version of Node.js that does not meet these
expectations, a warning will be emitted to the user to let them know
that they are using an unsupported version of Node.js

Change-Id: I3f9bcf8be483a80b5882d65b034c6655013df19f
Signed-off-by: Chris Kay <chris.kay@arm.com>

Standard Version was not bumping the package metadata files as it
should have been. It's not clear to me why, but there is an open
[GitHub issue][1] for documenting this behaviour.

[1]: https://github.com/conventional-changelog/standard-version/issues/506



Change-Id: Ie89a81272fe507a3d2e1cd33c6ac1bdcc8ac3d75
Signed-off-by: Chris Kay <chris.kay@arm.com>

The Standard Version tool will not recognize a release header as a
release header without the minor version, and will overwrite them when
generating the next release changelog.

Additionally, it will not generate a link to the tag diff unless a tag
of the form `vX.Y.Z` exists. We ought to generate tags with this version
format in the future to ensure the diff links are generated.

Change-Id: I7864ab7a5822f83ddb7a7917208d2d029ae34729
Signed-off-by: Chris Kay <chris.kay@arm.com>

This change replaces cz-conventional-changelog with cz-commitlint, which
automatically configures Commitizen using our commitlint configuration
file. Currently, we use some manual Javascript magic to load our
Commitizen configuration into commitlint (the opposite of what's
introduced by this change), which can be removed.

With this change, we also move our commitlint configuration into a
new `changelog.yaml` file. This file holds the same data as `.cz.json`
previously did.

Change-Id: I14ff2308f1a0b2b293c2128b28ca2df578ce9c1c
Signed-off-by: Chris Kay <chris.kay@arm.com>

* changes:
  docs(maintainers): update nxp layerscape maintainers
  docs(plat/nxp/layerscape): add ls1043a soc and board support
  feat(plat/nxp/ls1043ardb): add ls1043ardb board support
  feat(plat/nxp/ls1043a): add ls1043a soc support
  refactor(plat/ls1043): remove old implementation for platform ls1043
  feat(nxp/driver/dcfg): add some macro definition
  fix(nxp/common/setup): increase soc name maximum length
  feat(nxp/common/errata): add SoC erratum a008850
  feat(nxp/driver/tzc380): add tzc380 platform driver support
  feat(tzc380): add sub-region register definition
  feat(nxp/common/io): add ifc nor and nand as io devices
  feat(nxp/driver/ifc_nand): add IFC NAND flash driver
  feat(nxp/driver/ifc_nor): add IFC nor flash driver
  feat(nxp/driver/csu): add bypass bit mask definition
  feat(nxp/driver/dcfg): add gic address align register definition
  feat(nxp/common/rcpm): add RCPM2 registers definition
  fix(nxp/common/setup): fix total dram size checking
  feat(nxp/common): add CORTEX A53 helper functions

Added myself to be NXP common code and ls1028a, ls1043a platforms
maintainer.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iadffc5600e9bb2e94b1d545b8dd1a819358cabcb

Update document for nxp-layerscape to add ls1043a SoC and ls1043ardb
board support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I8442daf08a0f7c1ba982a3ed1d0ad24c4c420185

The LS1043A reference design board (RDB) is a computing, evaluation,
and development platform that supports the Layerscape LS1043A
architecture processor.

The old implementation in tf-a (plat/layerscape/board/ls1043/) is removed,
and this patch is adding it back, it is using the unified software
component and architecture with all the other Layerscape platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Change-Id: I83eee2f9254267b148960b05e25b6c9ba86cf07e

The LS1043A processor was NXP's first quad-core, 64-bit Arm based
processor for embedded networking.

The old implementation in tf-a (plat/layerscape/board/ls1043/) is removed,
and this patch is adding it back, it is using the unified software
component and architecture with all the other Layerscape platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: rocket <rod.dorris@nxp.com>
Change-Id: Ia3877530fae6479bd4a33bbe46b0c0d28ab43160

Remove old implementation for Layerscape ls1043a platform, and
will added it back with unified software architecture of all
Layerscape platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If038c19ab04d70050ec8e6ab2097b1c4f8324e87

Added offset for register DEVDISR2 and DEVDISR3, added
bit definiton for PORSR1_RCW, and some macro for SVR.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie49392b89280c6c2c3510fcb4c85d827a1efdac0

Increate SoC name length as it is not enough for some
SoC personalities.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2142b4b5162dd3c9ab3afefcdc859063836d8bcc

Add SoC erratum a008850 support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1ef41c67737b7b5fdf1d892929a2d8040effc282

Added TZC380 platform driver support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Id0aa6cb64fa7af79dd44e0dbb0e62cb2fd4cb824

Added sub-region register definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iab8130b56089d804c51ab967b184ddfc192e2858

Added IFC Nor and NAN flash as boot IO devices.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie1b87174d9c08d4e32138066b007fef6f8e3c5dd

Support IFC NAND flash as boot device.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1aba7035ff70b179915e181c04e7b00be2066abe

Add IFC Nor flash driver.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I3275664b8848d0fe3c15ed92d95fb19adbf57f84

* changes:
  fix(st-clock): correct types in error messages
  refactor(st-clock): directly use oscillator name
  feat(st-clock): check HSE configuration in serial boot
  feat(st-clock): manage disabled oscillator
  refactor(st-clock): improve DT parsing for PLL nodes

Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.

Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-off-by: Yann Gautier <yann.gautier@st.com>

This new function is used to fill the register(s) responsible to enable
high speed mode for pad in low voltage (<2.7V).

Change-Id: Ib8abc6628bdf51bbe6a866bc6a9bcdeb4a84a8f4
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.

Change-Id: I65295298a7ece572ae939e2db93d10b188de0f9e
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Use the clock framework functions in SYSCFG driver instead of dedicated
functions.

Change-Id: Ifb50a5207e8cecef1c80d86e2de4d70ab6bf8b8b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Use a timeout during IO compensation enable function, when
waiting for ready status. If timeout expires, print a warning
message, to indicate that the SoC recommendation is not followed.

Change-Id: I98c7dcb1364b832f4f4b5fc9a0b85a3741a8af4b
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

In a later patch, the stm32mp1_def.h will be reworked. The inclusion
of common/debug.h may not be done there through another included file.
Add this header inclusion in the files that need it.

Change-Id: I83687f7910032ca38c0856796580a650e1e41a68
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Add TZASC_BYPASS_MUX_DISABLE definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ife4d819e2af6deb5e027491d30f6b7c5f79764e7

Add some register fields definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I9fd78c318b34a2becd82d502fa6d18c8298eb40a

Added some RCPM2 register offset definiton for register: IPSTPCR,
IPSTPACKR and POWMGTDCR, also added OVRD bit definiton of register
POWMGTDCR.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I301bc1401e053c2089b5eb3672c6e649c805a2ab

total_dram_size should be signed value because it is equal to return
value of init_ddr(), so if it is lower or equal zero, report
error as DDR is not initialized correctly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Idbc40da103f60f10cb18c5306e97b764c1a9d372

Add helper function to disable the load-store prefetch.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I36d7be37e0b800ab1e5842a56cfd04d779338868

Replace wrong %d with the correct types.
This issue was found with the compilation flag:
-Wformat-signedness

Change-Id: Iec3817a245f964ce444b59561b777ce06c51a60a
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>