- Oct 05, 2021
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Isabella Gottardi authored
Change-Id: Icf09410f12072e8d7850dd1e540c3243af24ed09
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Isabella Gottardi authored
Change-Id: Ifd6d3d72abb1e8ce058e612295d01a148962627e
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- Oct 04, 2021
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Kshitij Sisodia authored
Documenting how the target platform's SRAM size impacts configuration files, sources and linker scripts. Change-Id: I8647ab67b73bafd0c44e6c586a1b5f2602bf03f5
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Kshitij Sisodia authored
AN547 sets the core clock for both M55 and U55 to 32MHz, while the blocks on APB use a different clock of 25MHz. Note: this will have not change any of the MPS3 FPGA profiling numbers (cycle counts and elapsed time in milliseconds) for Cortex-M55 as this was already using the correct counters under MPS3. The only difference would be that the system tick interrupt will fire every 10ms as intended instead of every 7.8125 ms as it is doing with current software. Change-Id: I77cd269c7c02f5d6e65328eb285185bae74e4e36
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- Sep 28, 2021
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Cisco Cervellera authored
* Update all dependancies to 21.08 * Refactoring to fit the new changes Change-Id: Icc2ae3628ee6e8fbc0af2cd8f91e368c9ccae053
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- Sep 27, 2021
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Isabella Gottardi authored
Change-Id: Id3919e5ec507bbfe7e7bf4c4c199b5dbdcc043d2
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- Sep 24, 2021
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Kshitij Sisodia authored
With this patch, the generic inference runner use-case can be configured to accept the model tflite file at run-time via the FVP's command line parameters. Same is true for the IFM and the inference results can be dumped out too. NOTE: this change is only for supporting the FVP, the FPGA implementation will not allow additional loading for the changes in this patch to be useful. Change-Id: I1318bd5b0cfb7bb635ced6fe58d22c3e401d2547
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Cisco authored
Change-Id: I3b75a9fe5b002a8206674aff154f44df2ccc85ca Reviewed-on: https://eu-gerrit-2.euhpc.arm.com/c/ml/ecosystem/ml-embedded-evaluation-kit/+/472168 Tested-by:
mlecosys <mlecosys@arm.com> Reviewed-by:
Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by:
Kshitij Sisodia <kshitij.sisodia@arm.com>
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- Sep 16, 2021
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MLECO-2083: Refactoring img_class and visual wake word *Added source files for visual wake word *Added tests *Added docs *Added new images for visual wake word demo *Refactored common functions in img_class, visual wake word and other usecases Change-Id: Ibd25854e19a5517f940a8d3086a5d4835fab89e9 Signed-off-by:
Éanna Ó Catháin <eanna.ocathain@arm.com>
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- Sep 15, 2021
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Isabella Gottardi authored
Change-Id: I4dbab11223697c6c1405a3466fdbe87e9b23cf0d
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Isabella Gottardi authored
Change-Id: Ie2f358ef52aaa8734ff09ead97aea72e5bda7f8b
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Cisco Cervellera authored
The ApplicationContext::Set function allocates always new memory for the attibute. When called multiple times (like it is done in most of the UseCaseHandler) this will generate a memory leak. The function now checks if the attibute exists; If it does it frees the memory and then allocate memory for the new attribute. Change-Id: I21db10009d6d0e360eab2dd33c344ef72eafe77f
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- Sep 07, 2021
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Nina Drozd authored
* updated vela version in setup resources script * updated vela version in documentation * updated minimum cmake version in documentation Change-Id: Iadd1d082bb7f6124016a2804fd7a28e59bf72639
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Cisco Cervellera authored
Change-Id: I0dab5308bf5c3eba9b4bb2c9bf0939ac9598d2f6
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- Sep 03, 2021
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Isabella Gottardi authored
Signed-off-by:
Isabella Gottardi <isabella.gottardi@arm.com> Change-Id: If8d6bf60cd4961be4c29f46ea75422b093185b04
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- Sep 02, 2021
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Éanna Ó Catháin authored
Change-Id: Id5c09851d4377cc52039a4988df93cfd84dab9c0 Signed-off-by:
Éanna Ó Catháin <eanna.ocathain@arm.com>
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- Sep 01, 2021
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Éanna Ó Catháin authored
Change-Id: I86b74c35572b52977991681e95c63934fed08bf0 Signed-off-by:
Éanna Ó Catháin <eanna.ocathain@arm.com>
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- Aug 13, 2021
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Change-Id: I744a4eb2553207004c9403b956e5bd9e9b352bfb Signed-off-by:
Isabella Gottardi <isabella.gottardi@arm.com>
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- Aug 12, 2021
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Richard Burton authored
* Now uses seperate TFLu github repo * Fixes to align with API changes * Update ASR model ops and re-enable ASR inference tests * Set default release level to release_with_logs Signed-off-by:
Richard Burton <richard.burton@arm.com> Change-Id: I57612088985dece1413c5c00a6e442381e07dd91
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George Gekov authored
Signed-off-by:
George Gekov <george.gekov@arm.com> Change-Id: I24c64064874b2e6baabdbff9c762972b816fc272
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- Aug 06, 2021
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Isabella Gottardi authored
* Fix broken link "building-for-different-ethos_u-npu-variants" * Corstone-300 + Ethos-U65 NPU support in memory_considerations Signed-off-by:
Isabella Gottardi <isabella.gottardi@arm.com> Change-Id: I2e99e2d24d3cd0bb64e06481862660d1b0679f20
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- Aug 05, 2021
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George Gekov authored
Signed-off-by:
George Gekov <george.gekov@arm.com> Change-Id: I32c05897085554f469bedc55e4e2800788121c55
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- Aug 03, 2021
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Cisco Cervellera authored
Change-Id: I64ab930a1de5210f435f91bed7600a700581946f Signed-off-by:
Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-on: https://eu-gerrit-2.euhpc.arm.com/c/ml/ecosystem/ml-embedded-evaluation-kit/+/459126 Tested-by:
mlecosys <mlecosys@arm.com> Tested-by:
George Gekov <george.gekov@arm.com> Reviewed-by:
George Gekov <george.gekov@arm.com> Reviewed-by:
Kshitij Sisodia <kshitij.sisodia@arm.com>
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- Jul 29, 2021
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Isabella Gottardi authored
Signed-off-by:
Isabella Gottardi <isabella.gottardi@arm.com> Change-Id: Iec096ffa7f711700dad08a015cf089520fbaff66
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- Jul 23, 2021
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Kshitij Sisodia authored
Breaking down the elf(axf) file into bin blobs for the simple_platform target too. Change-Id: Ie909508433ef03f8b4a32e04bc69353aed0d0849
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- Jul 20, 2021
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Isabella Gottardi authored
Change-Id: I803b1d4d8b4a19fa83c5c329760de2f7623b63fc
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- Jul 09, 2021
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George Gekov authored
Signed-off-by:
George Gekov <george.gekov@arm.com> Change-Id: I92b9ab60974ad266246994deae5833f7f374633d
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- Jul 08, 2021
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ASRSlidingWindow can be used in other use-cases, thus it was renamed to decouple from ASR. Signed-off-by:
alexander <alexander.efremov@arm.com> Change-Id: I2df977e4f18f490a532e0f27e3625b153ca464d7
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- Jul 01, 2021
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Kshitij Sisodia authored
Changes: * minor speed up for tflite to C++ file generation * virtual env's pip upgrade before installation of packages Change-Id: If8cef85779b7381f444f608b565da0b8f994d364
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- Jun 30, 2021
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Alexander Efremov authored
Signed-off-by:
alexander <alexander.efremov@arm.com> Change-Id: Idcfc0cb70cf0704528df48bfce2e60791bee3ade
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- Jun 28, 2021
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Cisco Cervellera authored
* Vela configuarion example broken link fixed to correct file. * Added missing entry (Building for default configuration) in the TOC Change-Id: I7c4c9a6db742968db144a4cfcfe97a159e960268
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- Jun 10, 2021
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George Gekov authored
Change-Id: Id6788b3fdc8ffae9079c99e95c459c5aa4abda7a Signed-off-by:
George Gekov <george.gekov@arm.com>
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- Jun 02, 2021
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Change-Id: I9b6b63724d136f36f57a9402059327f8fab27bf1 Signed-off-by:
George Gekov <george.gekov@arm.com>
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- May 28, 2021
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Kshitij Sisodia authored
Each use case documentation links fixed. Change-Id: I1aabd76bd9f7ba065ee26f6bac7f96b2441e80e8
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Kshitij Sisodia authored
Couple of minor links fixed for documentation.md. Change-Id: I4309bf83d8bc4c818a2d96bb54b3e0ecdfc27e4b
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- May 27, 2021
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Kshitij Sisodia authored
Change-Id: I6763f93ece5dde34ecae92f0c694c3cb971baf43
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Kshitij Sisodia authored
Major update for the documentation. Also, a minor logging change in helper scripts. Change-Id: Ia79f78a45c9fa2d139418fbc0ca9e52245704ba3
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Kshitij Sisodia authored
Minor documentation corrections for the location of `images.txt` file (used for MPS3 FPGA deployment). Change-Id: Icdeaae04a5b9132c0d2f3d48948588e4954a85e6
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- May 25, 2021
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Signed-off-by:
alexander <alexander.efremov@arm.com> Change-Id: Id4a9b220ce753a5ecf3483e86d837c1814dc7fb9
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- May 24, 2021
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Kshitij Sisodia authored
The counter val could have been 0 when read the first time quickly after the init function. The init function will now wait for the SysTick counter to start before returning. Also included are some minor changes to get around GNU's file stream implementation being line buffered. Change-Id: I8d51fef5d85f1261a6a5710608349d7ecc19ad62
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