- Nov 14, 2024
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- Add support for constant propagation via separate graphir pass set - Add RewriteFunctions attribute to select traversal direction - Constant propagation pass traversal direction is forward - Fixed test/util CreateGraph to not include constant tensors as Graph IO - This change introduces support for TOSA::LOGICAL_LEFT_SHIFT only Change-Id: I7d63f3c6b11c715fc76ec37f79e85e6a75f6aa87 Signed-off-by:
Mauricio Briceno <mauricio.briceno@arm.com>
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Johan Alfvén authored
- A MEAN op with IFM rank two and reduce in C dimension caused an output diff - The reason was that the intermediate tensor for calculating the sum had the wrong shape because the reduceAxis shape had been padded to 4D - The fix is to use the original reduceAxis shape when calculating the shape for the sum tensor Change-Id: I144adfe07f697fecba6f7237e8b216295654f8ae Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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- Nov 13, 2024
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Johan Alfvén authored
- Fixed a problem when the final scheduler cost contained wrong info about Weight buffer when it should not. This caused the tensor allocation to fail due to over allocation - The reason is that after optimizing the cascades, the final call to ProposeScheduleBuffering decided that it would not need any buffering. - However, due to some missing code the weight buffering cost was not cleared so memory size went over the limit - Added code to clear the weight buffering cost when it is not needed Change-Id: I92db5c6199c99ca1ae4a21b62dfd17f2cae6ac9b Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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- Nov 12, 2024
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William Isaksson authored
Removes contribution from previously buffered weights for an op to the buffering limit when proposing new weight buffering for the same op. Change-Id: If3ca6f6e359c29bc69f26c994503375cd353fba9 Signed-off-by:
William Isaksson <william.isaksson@arm.com>
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- Nov 11, 2024
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- This ensures produced artifacts are built with the same flags - For example valgrind can now parse debug symbols properly Change-Id: I798c0048890f546d2c2ec6a964ffa0f052de0840 Signed-off-by:
Mauricio Briceno <mauricio.briceno@arm.com>
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Johan Gunnarsson authored
Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: Ia61c19749958ea271385d5efcdc3682428303ab5
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Johan Gunnarsson authored
Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: Ie1504e5eba860785cfdf9fd09f508bd9c81e9026
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- Support TOSA TransposeConv2D with kernel strides 1 or 2 by adding support for output-padding. - Simplify DecomposeTransposeConv2D and breakout TFLite-specific padding to the TFLite reader. - Refactor InitializeSlice into TensorSlice.Initialize - Strides larger than 2 will require further decomposition MLBEDSW-9761 Change-Id: I54143461a5bc677ca7eefd91b9005dbdc7b924ec Signed-off-by:
Alexander Bengtsson <Alexander.Bengtsson@arm.com>
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- Nov 08, 2024
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Johan Alfvén authored
- Update ConvertToInterpolatingLUT16 to use float to match reference and avoid rounding issues - Update Exp int8 and int16 to use float to match reference Change-Id: Ia0b6912d665d243b2dab12b002c418d04e2e124d Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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Fredrik Svedberg authored
Fixed Transpose attributes not always initialized for supported Transpose operations. Change-Id: I205d4920f8da16d9e48c07946e21c66d564e888e Signed-off-by:
Fredrik Svedberg <fredrik.svedberg@arm.com>
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Johan Alfvén authored
- Update LUT table generation for RSQRT int16 to use float to match reference and avoid rounding issues Change-Id: I1d9af2a2f682dccadc918736f9e40a2e3e1c4986 Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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Johan Alfvén authored
- Softmax int16 should use double precision in ElementwiseMulScale in order to match reference and avoid rounding errors - Update ElementwiseMulScale to also support double, default behavior is float Change-Id: I207f95c273c66d99d994df2aa9cde144a01f80fe Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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- Nov 07, 2024
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Fredrik Svedberg authored
The ReshapeOptions attribute is optional for RESHAPE operations. Change-Id: I607282bdf3871dd364c96a762674378920268725 Signed-off-by:
Fredrik Svedberg <fredrik.svedberg@arm.com>
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Johan Alfvén authored
- Lowering of softmax can only be done as long as the product of IFM width and height is within max allowed size for tensor dimension Change-Id: Ifeacd3a8a8a9d7b1922a32b0475256d93a16fc8d Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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Johan Alfvén authored
- Update scale calculations to match reference for FULLY_CONNECTED - Refactor duplicate code and move RescalePerChannel to ethos_u_scaling Change-Id: Ib0fc05fcbdcb124bbe5cba39c253db1f8f084c63 Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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- Nov 06, 2024
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Alexander Bengtsson authored
- Remove StartChaining() and replace with ClearChainingRegisters() Change-Id: Ib2904ef6eb93f378699cab221e1c80542c46652d Signed-off-by:
Alexander Bengtsson <Alexander.Bengtsson@arm.com>
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Fredrik Svedberg authored
Added support for per channel scaling for Ethos-U55/65. Change-Id: I9d1962ec6061b149abb5ccebaba53fec5cd37333 Signed-off-by:
Fredrik Svedberg <fredrik.svedberg@arm.com>
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Johan Alfvén authored
- Operators with float input or output is not supported and should be set to OpType::Passthrough. This does not happen since the architecture constraint class is missing the float constraint - Update constraint class to reject datatype float - Use passthrough options in writer since passthrough op's do not have attribute data Change-Id: I7f2a8e18155a1c4c41761f4e8ff01ee9c8761298 Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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Check array length before reading pads in TFLiteGraphOptimiser::ConvertPad Change-Id: I0237f3466eb038e4ab39ec4b1e5ee23d2a78eec0 Signed-off-by:
Björn Davidsson <bjoern.davidsson@arm.com>
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- Nov 04, 2024
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Johan Gunnarsson authored
* Use DecomposeLargeAxis, but with untransposed OFM shape (ie. the IFM shape). Transpose the OFM offset and shape in DecomposeLargeAxis. * Don't pad shapes in RearrangeTranspose because then they won't match the perm attribute. * At the end of decomposition, there can now be multiple ops for each swap, so we must look for all ops using the first and last tensor when adjusting the tensor and quantization. Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: I3bf3579c247faef42ddd83ae09b803a4de35910d
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Fredrik Svedberg authored
Rename OpType::DepthwiseConv2DBias to OpType::DepthwiseConv2D. Change-Id: I6ab44d50339933689d77586f551ed773b6f97102 Signed-off-by:
Fredrik Svedberg <fredrik.svedberg@arm.com>
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- Nov 01, 2024
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Johan Gunnarsson authored
Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: I430d3d6cbc973ea48cb0cf2601f48972815d424c
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Johan Gunnarsson authored
Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: Ib887c2700d0be5d28875ad252d18a564464a4646
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Johan Gunnarsson authored
Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: I72db4a56a31c6887623d687529b0628f83e98a20
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- Oct 30, 2024
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Fredrik Svedberg authored
Set depth multiplier in GraphBuilder. Add depth multiplier decomposition in DecomposeDepthwiseConv2D. Change-Id: Ic1408dadba6e9587bff725308d17b5778d184be4 Signed-off-by:
Fredrik Svedberg <fredrik.svedberg@arm.com>
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- Oct 29, 2024
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Rickard Bolin authored
Add Ethos-U85 to the accelerator configuration documentation Change-Id: Iad1bb5f6d183730f6c268f143530674c1625a01d Signed-off-by:
Rickard Bolin <rickard.bolin@arm.com>
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- Oct 28, 2024
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Currrent behaviour gives up on double buffering tensors if the pre-buffering slice happens to be the minimal one. This patch makes sure that we also try to reduce the bufferingDepth before we give up in such a situation. Change-Id: I6f52ea7b74d18863668c533f0d37bd9b6d05deb8 Signed-off-by:
William Isaksson <william.isaksson@arm.com>
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- Oct 22, 2024
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The consumers and producers are managed automatically by the SchedulerOperation class. Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: I68ec801cbabbcf1dfc9e134a8f3339e7cad39118
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- Oct 21, 2024
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Johan Alfvén authored
- Batched Conv2D with kernel 1x1 can be optimized in the same way as FullyConnected - Add condition to RewriteFullyConnected to detect the Conv2D case - Moved condition to scheduler when to buffer for FullyConnect - Extend CanSubdivide with optype FullyConnected - Set AxisOrder in TOSA reader for Conv2D Change-Id: I8ecc9c5bb8700a00e18d54cb8cc209ab70d01f45 Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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Fredrik Svedberg authored
Original rounding mode of operation was replaced in GraphIrOptimiser::RewriteDepthwise. Change-Id: Ifd3d0f37af802bddf2b730eb509a2def29159bf5 Signed-off-by:
Fredrik Svedberg <fredrik.svedberg@arm.com>
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Add limited support for 4-bit data to the BufferView class, and update the code for repacking 4-bit constant weight data as 8-bit. Change-Id: I015b059348868bf21272c99c7b425dcf3f2c1a1d Signed-off-by:
Björn Davidsson <bjoern.davidsson@arm.com>
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Fredrik Svedberg authored
Changed order of input and output rescale fusing since the extra checks for input fusing on binary elementwise operations expects fusing to be done in this order. Change-Id: I5d796383de90a1477240bc45a94f5c2f71616530 Signed-off-by:
Fredrik Svedberg <fredrik.svedberg@arm.com>
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* Add support for reshaping shapes that are used to represent offsets. They may have zeros in them, which were clamped to ones when reshaping. * Extend unit tests. Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: Ib0a0796d36a7e6ff2d3cd1af97441dce07b53907
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- Oct 18, 2024
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- Handle ArgMax-specific datatype mappings by introducing EthosU85NpuOp::ArgMax. Change-Id: I0de682a2e28d2d70a67107973c26fc60bba0a50d Signed-off-by:
Alexander Bengtsson <Alexander.Bengtsson@arm.com>
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Johan Alfvén authored
- Replace all OpType::Conv2DBias with OpType::Conv2D since there is no different handling in the code base - Remove OpType::Conv2DBias Change-Id: Id444491c87b2a1ea3a9a6c5066b5406531cc025a Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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* Fix asserts. * Add unit tests. Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: Ibdcb9a157fca8e32ed59e03469aca2d14d5f220d
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Change-Id: I6c977a1b810de949e51204fa5f75782f3cbb8fb6 Signed-off-by:
Alexander Bengtsson <Alexander.Bengtsson@arm.com>
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- Oct 17, 2024
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Johan Alfvén authored
- An output diff occurred because decomposition was not done for convolutions when batch was greater than 1 - Add check to CanRunOnHardware checking for batch for conv - Use SliceShape instead of full shape in DecomposeConv2D and DecomposeDepthwiseConv2D Change-Id: Ic932ad329327beea75df8e76b48d737e53aa3cb0 Signed-off-by:
Johan Alfven <johan.alfven@arm.com>
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Rickard Bolin authored
- Assumed padValues were int32, but they can also be int64 Change-Id: I359fdf6f9c4fbb23926669c9f9207da44af18fa3 Signed-off-by:
Rickard Bolin <rickard.bolin@arm.com>
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* Remove transpose constraint for Ethos-U85. * Add decomposition of transpose operations. * Refactor the ReshapeTo3D functions. Signed-off-by:
Johan Gunnarsson <johan.gunnarsson@arm.com> Change-Id: I4bf7a69b65b71312c34eed4ae16d7d899383d134
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