n1sdp: increase pcie inbound register size to 48-bits
This patch increases the PCIe RP inbound region size to 48-bits
as there are cases where endpoint can generate a 48-bit VA
which gets translated by SMMU.
Change-Id: Ieca1c59b99f5da50e141237cd79f12ed17fc6ed7
Signed-off-by:
Manoj Kumar <manoj.kumar3@arm.com>
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