n1sdp: fix power domain tree view based on chip ID

This patch fixes the power domain tree view for master and slave
chips differently.

Master chip sees the power domains of both master and slave chips
whereas slave sees the power domain of only slave chip.

Master chip's SCP PD tree view will look like:

                    -----SYSTOP (LOGICAL)-------
                   /                            \
                  /                              \
            ---SYSTOP0--                   ---SYSTOP1--
           /      |     \                 /      |     \
          /       |      \               /       |      \
         /        |       \             /        |       \
    CLUS0       CLUS1    DBGTOP0   CLUS2       CLUS3     DBGTOP1
   /    \      /    \             /    \      /    \
 CPU0--CPU1--CPU2--CPU3---------CPU4--CPU5--CPU6--CPU7

 Here the SYSTOP LOGICAL is at PD level 3 but currently there is an
 issue  in handling level 3 in PD driver. So until it is fixed, the
 master chip's SCP uses the following PD tree view:

            --------------SYSTOP0--------------
           /        /        |         \       \
          /        /         |          \       \
         /        /          |           \       \
    CLUS0       CLUS1      CLUS2       CLUS3  DBGTOP0
   /    \      /    \      /    \      /    \
 CPU0--CPU1--CPU2--CPU3--CPU4--CPU5--CPU6--CPU7

 The slave chip's SCP however looks a single chip view of PD tree having
 its own local power domains and looks like below:

            ---SYSTOP0--
           /      |     \
          /       |      \
         /        |       \
    CLUS0       CLUS1    DBGTOP0
   /    \      /    \
 CPU0--CPU1--CPU2--CPU3

Change-Id: I83b339261d6ddda9660d5d8c6b575fadf48e70bd
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>