- Mar 31, 2022
-
-
Sayanta Pattanayak authored
Get remote memory node details from Remote Memory HOB list. Prepare SRAT table with both Local memory, remote memory blocks, along with other necessary details. Prepare HMAT table with required proximity, latency info. In Single-Chip scenario, one of the primary use case, of having extended remote memory area and SRAT,HMAT table, is to avail the extended remote memory region as CXL.Memory. Signed-off-by:Sayanta Pattanayak <sayanta.pattanayak@arm.com> Change-Id: I01488ae9cf34b22177ef3d732f674be3e0409f21
-
Sayanta Pattanayak authored
Fetch details regarding Remote Memory regions from DTB, passed by lower level firmware. Get follwing details - Count of extended remote memory regions. Base address and size of each memory regions. Create Hoblist of the extended remote memory region structure, which will be used for preparing ACPI tables. Signed-off-by: -
Sayanta Pattanayak authored
8GB address region starting at 0x3FE00000000 is reserved for extended Remote Memory use. Resource descriptor for remote memory region is added. One of the use case, for extended remote memory region, is using it as CXL.Mem region. Also marked Local memory block count, for creating SRAT tables in subsequent patch. Signed-off-by:
-
- Mar 30, 2022
-
-
FFA use DT to pass secure partition manifest info. Signed-off-by:Achin Gupta <achin.gupta@arm.com> Change-Id: I4ce9116e554c92790bc261f9e198969f8d000ba3
-
Remove system level cache (SLC) entry from ACPI PPTT table. SLC can be considered as a memory side cache and hence it can be removed from PPTT. Change-Id: I3e25d609ba485b5d4836f991387992f1b0bdfc9b Signed-off-by:
Pranav Madhu <pranav.madhu@arm.com> -
This reverts commit de19e08d. Signed-off-by:
Pranav Madhu <pranav.madhu@arm.com>
Change-Id: Ic349f614fa73c182fd0f5318417fcda2adc7c28c
-
- Mar 29, 2022
-
-
Enable PcdFfaEnable flag for StandaloneMm on rdn2 platform. Add fdtlib, needed for StandaloneMm DTS parsing. Signed-off-by: -
DMC-620 memory controller improves system reliability by generating interrupts on detecting ECC errors on the data. Add a initial DMC-620 MM driver that implements a MMI handler for handling single-bit ECC error events originating from the DRAM. The driver implements the HEST error source descriptor protocol in order to publish the GHES error source descriptor for single-bit DRAM errors. The GHES error source descriptor that is published is of type 'memory error'. A GHES error source descriptor is published for each instances if the DMC-620 controller in the system. The driver registers a MMI handler for handling 1-bit DRAM ECC error events. The MMI handler, when invoked, reads the DMC-620 error record registers and populates the EFI_PLATFORM_MEMORY_ERROR_DATA type error section information structure with the corresponding information read from the error record registers. Co-authored-by:
Thomas Abraham <thomas.abraham@arm.com> Signed-off-by:
Omkar Anand Kulkarni <omkar.kulkarni@arm.com> Change-Id: I2530b174c5398c2db86220200fa29ecfdcc5cca1
-
Enable the use SRAM MM driver on RD platforms. This allows firmware-first error handling and reporting of SRAM's 1-bit CE that are detected by base SRAM Ecc. Signed-off-by: -
Support added for handling 1-bit CE that are detected by Sram Ecc. The driver implements the HEST error source descriptor protocol in order to publish the GHESv2 type error source descriptor for 1-bit Sram errors. The GHESv2 error source descriptor that is published is of type 'Memory Type Error'. The driver registers a MMI handler for handling 1-bit CE errors. On error event, the TF-A calls into secure partition with error info like whether the error occured on secure or non secure Sram. The MMI handler populates Memory Error Section information structure and returns. Signed-off-by: -
Enable the use CPU MM driver on SGI/RD platforms. This allows firmware-first error handling and reporting of CPU's 1-bit CE and DE that happen on caches, TLB's and MMU. Signed-off-by: -
Support added for handling 1-bit CE and DE that occur on CPU's L1 & L2 caches, TLB and MMU. MMI handler is implemented that collects all the error information and notifies OS. The driver implements the HEST error source descriptor protocol in order to publish the GHESv2 type error source descriptor for single-bit DRAM errors. The GHESv2 error source descriptor that is published is of type 'ARM Processor Error'. The driver registers a MMI handler for handling 1-bit CE and DE errors. On error event, the TF-a collates all the error information including the error record registers, the context registers and invokes the MMI handler. Depending on the security state of the error, the handler populates ARM Processor Error Section information structure and returns. Signed-off-by: -
Enables firmware first error handling on the given platform. Installs and publishes the SDEI and HEST ACPI tables required for firmware first error handling. Signed-off-by: -
For ACPI tables that are generated dynamically, define the ACPI table header values that have to be used to build the table header. Co-authored-by:
-
Enable the use of HEST table generation protocol, GHES error source descriptor protocol on ARM Neoverse Reference Design platforms. This enables the framework to support firmware first error handling on ARM Neoverse Reference Design platforms. Co-authored-by:
-
Downgrade ACPI PPTT table to revision 2 as specified in ACPI 6.3 specification. With PPTT table revision 3, WinPE fails to boot. This is temporary fix to allow WinPE to boot. Change-Id: Ie187421451be931556b8c3ed0282dce840ef8477 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Update the Rd-N2-Cfg1 platform specific ACPI tables to ACPI version v6.4. Change-Id: If12507c575d4bd6b2ac27d13c1437fd543d53df2 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Update the Rd-N2 platform specific ACPI tables to ACPI version v6.4. Change-Id: I8999dab4fb14553f00a802449c55d0d0a8069b34 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Update the Rd-V1 multichip platform specific ACPI tables to ACPI version v6.4. Change-Id: I2acba7b1d9eddba344734577b93788616dd11861 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Update the Rd-V1 platform specific ACPI tables to ACPI version v6.4. Change-Id: I51e358f44fca285ebb6c1eb8f5c7753a5ae3217a Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Update the Rd-E1-Edge platform specific ACPI tables to ACPI version v6.4. Change-Id: If2d78c84a9b0a384a070bc86608f7b1e4e690acf Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Update the Rd-N1-Edge multichip platform specific ACPI tables to ACPI version v6.4. Change-Id: Iac3ef0b6243f6fbeeb71a88742b0090f4bf12b15 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Update the Rd-N1-Edge platform specific ACPI tables to ACPI version v6.4. Change-Id: Id8a49684b5ac40830c885442accbae6153a67b75 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Update the SGI-575 platform specific ACPI tables to ACPI version v6.4. Change-Id: Ib1fc3285b1c0631e45cc92a4af68708b5e128a95 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Update the common ACPI tables used by all the Neoverse Reference Design platforms to ACPI version v6.4. Change-Id: Ie435a457e7bcd6c435e9da922fdc07e94f2f6b37 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Route secure (from secure partition) and non-secure console messages to different sets of UART console ports. This aligns with the security state the PE is in when logs are put out. In addition, this allows consolidation of UART related macros across all the variants of Neoverse reference design platforms. Signed-off-by:Rohit Mathew <rohit.mathew@arm.com> Change-Id: Iadbb06df05751f304bad8a0a9bf541fedbf163ab
-
- Mar 28, 2022
-
-
Add a new device entry in the SSDT ACPI table to describe the serial port used as the debug port. On the Neoverse reference design platforms, the UART0 port of the SoC sub-system is used as the debug port. Signed-off-by: -
The outputs of the serial console and serial debug ports are incorrectly routed to the same UART port. Fix this by changing the UART port address in the SPCR ACPI table. Signed-off-by: -
Remove redundant platform descriptions (descriptions which are already part of SSDT) from DSDT for SGI-575 platform. Signed-off-by: -
Fix the ACPI _LPI object's control method for RD-N2 platform. This platform supports only the platform co-ordinated LPI. Accordingly, correct the LPI Level ID value. Additionally, as this platform does not support residency counter, clear the residency counter frequency from _LPI object's control method. The RD-N2-Cfg2 platform is a direct connect platform, hence this patch remove the cluster _LPI control method from DSDT table. Change-Id: I19e8aa6864f0a22b3ed3b52a840d0a3753c2e3b7 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Fix the ACPI _LPI object's control method for RD-N2-Cfg1 platform. This platform supports only the platform co-ordinated LPI. Accordingly, correct the LPI Level ID value. Additionally, as this platform does not support residency counter, clear the residency counter frequency from _LPI object's control method. The RD-N2-Cfg1 platform is a direct connect platform, hence this patch remove the cluster _LPI control method from DSDT table. Change-Id: If9b2cfec382086b7efa8fd717f91df655a2be7bd Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Fix the ACPI _LPI object's control method for RD-N2 platform. This platform supports only the platform co-ordinated LPI. Accordingly, correct the LPI Level ID value. Additionally, as this platform does not support residency counter, clear the residency counter frequency from _LPI object's control method. The RD-N2 platform is a direct connect platform, hence this patch remove the cluster _LPI control method from DSDT table. Change-Id: I18bae543bdbf91581916afdab5678f4ff95484d5 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Fix the ACPI _LPI object's control method for RD-V1-MC platform. This platform supports only the platform co-ordinated LPI. Accordingly, correct the LPI Level ID value. Additionally, as this platform does not support residency counter, clear the residency counter frequency from _LPI object's control method. Clear the enable parent state field as well as there is no parent state available. Change-Id: Ibda5af07a1f105349dfe1357d444091057527702 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Fix the ACPI _LPI object's control method for RD-V1 platform. This platform supports only the platform co-ordinated LPI. Accordingly, correct the LPI Level ID value. Additionally, as this platform does not support residency counter, clear the residency counter frequency from _LPI object's control method. Clear the enable parent state field as well as there is no parent state available. Change-Id: Ic13d7267fb54b336058a48ababca7ae69ce9accd Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Fix the ACPI _LPI object's control method for RD-N1-Edge-X2 platform. This platform supports only the platform co-ordinated LPI. Accordingly, correct the LPI Level ID value. Additionally, as this platform does not support residency counter, clear the residency counter frequency from _LPI object's control method. Change-Id: I3d46537a223875ae3073c4822ff5b7ded067e4fe Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Fix the ACPI _LPI object's control method for RD-N1-Edge platform. This platform supports only the platform co-ordinated LPI. Accordingly, correct the LPI Level ID value. Additionally, as this platform does not support residency counter, clear the residency counter frequency from _LPI object's control method. Change-Id: I3377583a83aaf81327acd7b617c98c6247fd6513 Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Fix the ACPI _LPI object's control method for SGI-575 platform. This platform supports only the platform co-ordinated LPI. Accordingly, correct the LPI Level ID value. Additionally, as this platform does not support residency counter, clear the residency counter frequency from _LPI object's control method. Change-Id: Id31a850638c6ba85da4e70869a43badf80e893ce Signed-off-by:Pranav Madhu <pranav.madhu@arm.com> -
Provide PcdLinuxBootFileGuid and use LinuxBootBootManager Library instance of the PlatformBootManager Library for linuxboot in RD-N2-Cfg1 platform. Signed-off-by:
Shriram K <shriram.k@arm.com>
Change-Id: Ic0127301237e7d10cb932ee506811bba169df77c -
Provide PcdLinuxBootFileGuid and use LinuxBootBootManager Library instance of the PlatformBootManager Library for linuxboot in RD-N2 platform. Signed-off-by:Shriram K <shriram.k@arm.com>
Change-Id: I76c89e0ca7ad5c744dc453dde88d0659d3515ba1 -
Provide PcdLinuxBootFileGuid and use LinuxBootBootManager Library instance of the PlatformBootManager Library for linuxboot in RD-V1 platform. Signed-off-by:Shriram K <shriram.k@arm.com>
Change-Id: Ia4a5ee6284e7f40e906b9a304f336ab6f1944f94
-
