infra/common: document N2 CPU error handling test
Add the document guide to perform 1-bit CE error injection and handling
on N2 CPU. This document covers both validation of firmware first and
kernel first error handling software approaches.
Signed-off-by:
Omkar Anand Kulkarni <omkar.kulkarni@arm.com>
Change-Id: I628b51480f8b87bdf159f3db57a9cf426c77f1cf
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