Improve SIMD & FP constant materialization (#74)

* Fix a code generation issue inside the MacroAssembler::Movi64bitHelper()
method that could set the upper 64 bits of a vector register to an
incorrect value instead of 0
* Reduce the instructions necessary to materialize a vector constant
by 2 when the upper 64 bits are 0, while the lower ones aren't
* Restructure the code paths for the immediate forms of FMOV, so
that the common case, 0, is handled first