KVM: arm64: nv: Honor MDCR_EL2.{TPM, TPMCR} in Host EL0

TPM and TPMCR trap bits also affect Host EL0. How fun.

Mark these two trap bits as such and take advantage of the new
infrastructure for dealing w/ EL0 traps.

Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20241025182354.3364124-10-oliver.upton@linux.dev


Signed-off-by: Oliver Upton <oliver.upton@linux.dev>