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Commit 469c76a8 authored by Dhananjay Ugwekar's avatar Dhananjay Ugwekar Committed by Peter Zijlstra
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perf/x86/rapl: Fix the error checking order

After the commit b4943b8b ("perf/x86/rapl: Add core energy counter
support for AMD CPUs"), the default "perf record"/"perf top" command is
broken in systems where there isn't a PMU registered for type
PERF_TYPE_RAW.

This is due to the change in order of error checks in rapl_pmu_event_init()
Due to which we return -EINVAL instead of -ENOENT, when we reach here from
the fallback loop in perf_init_event().

Move the "PMU and event type match" back to the beginning of the function
so that we return -ENOENT early on.

Closes: https://lore.kernel.org/all/uv7mz6vew2bzgre5jdpmwldxljp5djzmuiksqdcdwipfm4zm7w@ribobcretidk/


Fixes: b4943b8b ("perf/x86/rapl: Add core energy counter support for AMD CPUs")
Reported-by: default avatarKoichiro Den <koichiro.den@canonical.com>
Signed-off-by: default avatarDhananjay Ugwekar <dhananjay.ugwekar@amd.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20250129080513.30353-1-dhananjay.ugwekar@amd.com
parent 2014c95a
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