WIP: perf/arm_cspmu: Support 64-bit programmers' model

The 64-bit Programmers' model extension not only guarantees 64-bit
counters with single-copy atomic access, but also makes all the other
registers 64-bit as well, of which we most need to care about PMCCFILTR,
PMEVFILTR<n>, and PMEVTYPER<n>. Our event config fields are ready for
this internally, but we need a few more tweaks to propagate 64-bit
values properly from end to end.

Annoyingly, even though this extension has a profound impact on the
register layout, it does not have a reliable way to identify itself.
What it does have, however, is a co-dependency with another extension
which we can detect.

TODO: what to do with that pesky cycle count event?

Signed-off-by: Robin Murphy <robin.murphy@arm.com>