BACKPORT: arm64: KVM: Enable access to TRBE support for host

For a nvhe host, the EL2 must allow the EL1&0 translation
regime for TraceBuffer (MDCR_EL2.E2TB == 0b11). This must
be saved/restored over a trip to the guest. Also, before
entering the guest, we must flush any trace data if the
TRBE was enabled. And we must prohibit the generation
of trace while we are in EL1 by clearing the TRFCR_EL1.

For vhe, the EL2 must prevent the EL1 access to the Trace
Buffer.

The MDCR_EL2 bit definitions for TRBE are available here :

  https://developer.arm.com/documentation/ddi0601/2020-12/AArch64-Registers/



Bug: 174685394
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210405164307.1720226-8-suzuki.poulose@arm.com


Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
(cherry picked from commit a1319260)
[Conflict:
 - arch/arm64/kvm/debug.c
 - arch/arm64/kvm/hyp/nvhe/debug-sr.c

Trivial conflicts except for one  which tried to replce

	kvm_arm_setup_mdcr_el2(vcpu);

we rejected that hunk.]
Signed-off-by: Qais Yousef <qais.yousef@arm.com>
Change-Id: I88316a7b2d7b7b23a01914a7de0a2898c4a66afa