mailbox: arm_mhu: add support for mhuv2

ARM has launched a next version of MHU i.e. MHUv2 with its latest
subsystems. The major changes that have gone into MHUv2 are,
MHUv2 now have two separate physical channels for Secure & Non-Secure
communications with two dedicated channels each for send & receive.
So, in all MHUv2 have total of 4 physical channels instead of 1 which
was shared across all the communications in case of older version of
MHU.

Also, with MHUv2 the non-secure communication happens over either High
priority channel (N=0) or Low priority channel (N=1) which has an offset
of 0x0 or 0x20 respectively. For, secure communication it still uses
single channel (N=0) which has an offset of 0x0. MHUv2 can support
upto 32 (N=31) sub-channels each having a width of 0x20 across secure
& non-secure channel. Base offset of any sub-channel N = (N * 0x20).

0x0  0x20  0x40               0x1000
---------------------....-----
| SE |    |    |    |        |
---------------------....-----
   Secure Transmit Channel

0x0  0x20  0x40               0x1000
---------------------....-----
| SE |    |    |    |        |
---------------------....-----
    Secure Receive Channel

0x0  0x20  0x40               0x1000
---------------------....-----
| HP | LP |    |    |        |
---------------------....-----
  Non-Secure Transmit Channel

0x0  0x20  0x40               0x1000
---------------------....-----
| HP | LP |    |    |        |
---------------------....-----
  Non-Secure Receive Channel

The register offsets have also changed for STAT, SET & CLEAR registers
from 0x0, 0x8 & 0x10 in MHUv1 to 0x0, 0xC & 0x8 in MHUv2 respectively.

0x0    0x4  0x8  0xC             0x1F
------------------------....-----
| STAT |    |    | SET |    |   |
------------------------....-----
      Transmit Channel

0x0    0x4  0x8   0xC            0x1F
------------------------....-----
| STAT |    | CLR |    |    |   |
------------------------....-----
        Receive Channel

With MHUv2, the receiver can be put to sleep by the MHU controller
in order to save power. So, in order for the receiver to be
awake when the sender wants to send data, the sender has to set
ACCESS_REQUEST register first in order to wake-up receiver if it was
asleep, state of which can be detected using ACCESS_READY register.
ACCESS_REQUEST has an offset of 0xF88 & ACCESS_READY has an offset
of 0xF8C and are accessible only on any transmit channel.

This patch adds necessary changes required to support the older
version of MHU & the latest MHUv2 controller. This patch also updates
DT binding for ARM MHU as we need a compatible string as
arm,mhuv2-doorbell for differentiating MHUv2 DT and also added second
register base (tx base) which would be used as the send channel base
for non-secure channels. (If the kernel is running in secure mode then
the same tx base address can be used as the send channel base register
for secure channel too.)

JIRA: https://jira.arm.com/browse/PLATFORMS-826
JIRA: https://jira.arm.com/browse/PLATFORMS-1026
JIRA: https://jira.arm.com/browse/PLATFORMS-1508



Change-Id: I62868dc94ea8ae1ec105db1e3edf4e5bbbff5ae1
Signed-off-by: Samarth Parikh <samarth.parikh@arm.com>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>