Skip to content
Commit c3dffa87 authored by Jisheng Zhang's avatar Jisheng Zhang Committed by Conor Dooley
Browse files

riscv: dts: sophgo: add initial CV1800B SoC device tree



Add initial device tree for the CV1800B RISC-V SoC by SOPHGO.

Signed-off-by: default avatarJisheng Zhang <jszhang@kernel.org>
Acked-by: default avatarChen Wang <unicorn_wang@outlook.com>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
parent 32ecb28b
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment