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Commit c1380adf authored by Xianwei Zhao's avatar Xianwei Zhao Committed by Jerome Brunet
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clk: meson: s4: fix fixed_pll_dco clock



The fixed_pll_dco output frequency is not accurate,
add frac factor for fixed_pll_dco clk to fix it.

Fixes: 57b55c76 ("clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller")
Signed-off-by: default avatarXianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20240603-s4_fixedpll-v1-1-2b2a98630841@amlogic.com


Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent 1613e604
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