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Commit 9cbb035c authored by Bin Meng's avatar Bin Meng Committed by Cyrille Pitchen
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spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT



The number of protected range registers is not the same on BYT/LPT/
BXT. GPR0 only exists on Apollo Lake and its offset is reserved on
other platforms.

Signed-off-by: default avatarBin Meng <bmeng.cn@gmail.com>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarCyrille Pitchen <cyrille.pitchen@wedev4u.fr>
parent 824af37e
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