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Commit 9bfa2544 authored by Claudiu Beznea's avatar Claudiu Beznea
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ARM: dts: at91: sam9x60: fix the ddr clock for sam9x60



The 2nd DDR clock for sam9x60 DDR controller is peripheral clock with
id 49.

Fixes: 1e5f532c ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221208115241.36312-1-claudiu.beznea@microchip.com
parent 1b929c02
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