- Sep 27, 2017
-
-
Serg Titaevskiy authored
Some test-case names were different from arguments passing by unittests.cfg. So, these cases didn't PASS really. Signed-off-by:
Serg Titaevskiy <stitaevskiy@virtuozzo.com> Message-Id: <1506512498-27529-1-git-send-email-stitaevskiy@virtuozzo.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
- Sep 20, 2017
-
-
Paolo Bonzini authored
We need to restore PDPE.U=1, similar to what the tests do after printing the "Set SMEP in CR4 - expect #GP: FAIL" message. Signed-off-by:
-
Paolo Bonzini authored
The "-cpu qemu64" option does not enable newer x86 features. Add them through extra_params. Signed-off-by:
-
David Hildenbrand authored
Test the parameter checks and if the query function correctly works. Tests will only be executed if the corresponding stfl(e) bit for an instruction is indicated. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170919145033.16959-6-david@redhat.com> Signed-off-by:
-
David Hildenbrand authored
cpacf.h will require the test_facility() function, so let's properly query and store the STFL(E) facilities. STFLE requires double word alignment. Signed-off-by:
-
David Hildenbrand authored
We don't define BUG(), just use a return instead. Signed-off-by:
-
David Hildenbrand authored
Add arch/s390/include/asm/cpacf.h from Linux v4.13. Signed-off-by:
-
David Hildenbrand authored
Add a new file "emulator.c" and keep running tests simple for now (no support for multiple iterations and such stuff). We will get this for free once we switch to a new, general API for running/defining tests. Signed-off-by:
-
- Sep 15, 2017
-
-
Paolo Bonzini authored
When the APIC virtualization address references unbacked memory, kvm incorrectly fails a VM-entry with "invalid control field(s)." Until this can be fixed, just skip the VMX control field tests that populate a VMCS field with a physical address that isn't backed. Signed-off-by: -
Jim Mattson authored
This test checks that a nested VM-entry fails if the "use TPR shadow" VM-execution control is set, the "virtual-interrupt delivery" VM-execution control is clear, and the TPR threshold is greater than 0xf. Signed-off-by:
Jim Mattson <jmattson@google.com> Signed-off-by:
-
- Sep 12, 2017
-
-
Paolo Bonzini authored
Signed-off-by: -
Wei Huang authored
Currently pmu.c sets num_counters to MIN(num_gp_counters, num_gp_events). This is to prevent the out-of-bound access to gp_events[] array in check_counters_many(). However it also means that check_counters_many() can NOT stress all gp counters if num_gp_counters > num_gp_events. This small patch changes the value of num_counters back to num_gp_counters and prevents the out-of-bound problem by using the mod function in the array access. Signed-off-by:
Wei Huang <wei@redhat.com> Message-Id: <1504901592-10357-1-git-send-email-wei@redhat.com> Signed-off-by:
-
Yu Zhang authored
Provide paging mode switching logic to run access test in 5 level paging mode if LA57 is detected. Qemu parameter +la57 should be used to expose this feature, for example: ./x86-run ./x86/access.flat -cpu qemu64,+la57 Signed-off-by:
Yu Zhang <yu.c.zhang@linux.intel.com> Message-Id: <1503662251-13895-1-git-send-email-yu.c.zhang@linux.intel.com> Signed-off-by:
-
Paolo Bonzini authored
TCG always allows setting CR4.SMEP, even when the CPUID bit is disabled. In this case, however, the test causes a triple fault because it tries to execute a user page with CR4.SMEP=1. The right way to do the test is to go through set_cr4_smep. Change set_cr4_smep to return whether an exception happened, and use it in ac_test_run. Signed-off-by:
-
- Aug 25, 2017
-
-
Jim Mattson authored
Older versions of bash need the extra quotes. Otherwise, the entire version gets assigned to 'v,' after replacing spaces with periods. (e.g. v="4 9"; p="".) Signed-off-by:
-
Paolo Bonzini authored
This is a bit more resilient to changes in the compiler. If the compiler puts spill instructions before or after the label, the test may fail spuriously. Signed-off-by: -
Jim Mattson authored
This test checks that a nested VM-entry fails if the "use TPR shadow" VM-execution control is set and the virtual-APIC address is illegal. A legal virtual-apic address is 4k-aligned and within the physical address space supported by the processor. Signed-off-by:
-
Jim Mattson authored
If the CR3 target count is too high, VM-entry should fail. Signed-off-by:
-
Jim Mattson authored
This test checks that a nested VM-entry fails if reserved bits in the primary processor-based VM-execution controls are not set properly (according to either the IA32_VMX_PROCBASED_CTLS MSR or the IA32_VMX_TRUE_PROCBASED_CTLS MSR, as appropriate). It also checks that a nested VM-entry fails if the "activate secondary controls" VM-execution control is set and a reserved bit is set in the secondary processor-based VM-execution controls (according to the IA32_VMX_PROCBASED_CTLS2 MSR). Signed-off-by:
-
Jim Mattson authored
This test checks that a nested VM-entry fails if reserved bits in the pin-based VM-execution controls are not set properly (according to either the IA32_VMX_PINBASED_CTLS MSR or the IA32_VMX_TRUE_PINBASED_CTLS MSR, as appropriate). Signed-off-by:
-
- Aug 24, 2017
-
-
Paolo Bonzini authored
Signed-off-by:
-
- Aug 17, 2017
-
-
Paolo Bonzini authored
Add missing tscdeadline_immed test and avoid having two extra_params declarations. Signed-off-by:
-
- Aug 10, 2017
-
-
Andrew Jones authored
Rather than unconditionally attempting ptimer tests, which won't work on older KVM, check the KVM version first, reporting SKIP when the tests would fail. This also allows vtimer and ptimer tests to be merged into just "timer" tests. Signed-off-by:
Andrew Jones <drjones@redhat.com> Signed-off-by:
-
Paolo Bonzini authored
Signed-off-by: -
Jim Mattson authored
Test for consistency of mixed accesses to full and high parts of 64-bit VMCS fields. (Currently just tests TSC_OFFSET, which is one of the fields shadowed by kvm.) Signed-off-by:
-
- Aug 03, 2017
-
-
Christoffer Dall authored
We were using the virtual counter to calculate a timer cval which is 10 seconds in the future, but this obviously doesn't work for the physical timer which is bases on the physical counter. Make sure we use a properly paired timer/counter pair. Reported-by:
Christoffer Dall <cdall@linaro.org> Signed-off-by:
Radim Krčmář <rkrcmar@redhat.com>
-
Andrew Jones authored
Checked all the bash scripts with shellcheck --shell=bash checking with and without the following exclude list --exclude=SC1091,SC2004,SC2006,SC2086,SC2143,SC2155 Even with the exclude list there were some warnings not fixed with this patch, but those are OK. Signed-off-by:
-
- Aug 02, 2017
-
-
Thomas Huth authored
Most of the SPRS are the same as on POWER8, so we can re-use the PowerISA 2.07 functions and simply amend the additional registers afterwards. Signed-off-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Laurent Vivier <lvivier@redhat.com> Signed-off-by:
-
- Jul 26, 2017
-
-
Radim Krčmář authored
Spaces in an argument made the quoted result occupy multiple array fields after splitting. The test broke if the third argument was shifted because of that. (arm/gicv2*) Populate the array explicitly, instead of relying on splitting. Signed-off-by:
-
Andrew Jones authored
Signed-off-by:
-
Christoffer Dall authored
The current timer test relies on testing the pending state of the timer before the interrupt handler has run which could lower the pending signal again (because it masks the timer output signal). What we really want is to make sure the output signal from the timer as perceived by the virtual interrupt controller is low when the timer is programmed some time far in the future. The proper way to do that is to disable the timer interrupt on the distributor and then reading its pending state. Signed-off-by:
-
- Jul 24, 2017
-
-
Christoffer Dall authored
Rearrange the code to be able to reuse as much as posible and add support for testing the physical timer as well. Also change the default unittests configuration to run a separate vtimer and ptimer test so that older kernels without ptimer support just show a failure. Signed-off-by:
-
Christoffer Dall authored
When running the vtimer test on an APM X-Gene, setting the timer value to (2^64 - 1) apparently results in the timer always firing, even thought the counter is mich lower than the cval. Since the idea of the code is to set everything up and schedule the timer for some time very far in the future, take a pragmatic approach and just add 10s worth of delay instead. Signed-off-by:
-
Christoffer Dall authored
The timer irq_handler is supposed to mask the timer signal, but unfortunately also disables the timer at the same time, even though we loop and wait on ISTATUS to become set. According to the ARM ARM, "When the value of the ENABLE bit is 0, the ISTATUS field is UNKNOWN." This test happens to work on AMD Seattle, but doesn't work on Mustang or on QEMU with TCG. Fix the problem by preserving the enable bit in the irq handler. Signed-off-by:
-
- Jul 21, 2017
-
-
Roman Kagan authored
When a SynIC timer expires it attempts to deliver a message to the corresponding slot, which may be busy (e.g. because the guest hasn't yet processed the previous message). KVM used to livelock here, endlessly retrying message delivery without letting the guest to run and release the slot (a patch fixing that has been posted to KVM ml). Add a testcase for this scenario. Signed-off-by:Roman Kagan <rkagan@virtuozzo.com>
-
Jim Mattson authored
VM-entry is disallowed in the shadow of a MOV-to-SS instruction. When the current-VMCS is valid, check that the instruction pointer falls through to the next instruction, the ALU flags are set to ZF (VMfailValid), and the VM-instruction error field contains 26 ("VM entry with events blocked by MOV SS."). Signed-off-by:
-
- Jul 19, 2017
-
-
Jim Mattson authored
vmptrst stores a 64-bit physical address to memory (or -1 if there is no current VMCS). Signed-off-by:
-
- Jul 13, 2017
-
-
Andrew Jones authored
When checking a kernel version to see if errata should be set, also check the kernel extraversion, if given in the errata.txt. Also, reformat errata.txt to allow for longer version names and to remove the tabs. Signed-off-by:
-
- Jul 11, 2017
-
-
Jim Mattson authored
Ultimately, this test will be expanded to cover all of the "Checks on VMX Controls" described in the Intel SDM, volume 3, section 26.2.1. For now, it just checks I/O bitmap and MSR bitmap settings. Signed-off-by:
-
- Jul 04, 2017
-
-
Andrew Jones authored
Signed-off-by:
-
