Broken by commit c76ddf06
due to a copy-and-paste bug.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Since Qemu commit 9b4cf107b09d ("hyperv: only add SynIC in compatible
 configurations") hv_vpindex flag is mandatory if hv_synic is used:

$ qemu-system-x86_64 -nodefaults -cpu kvm64,hv_time,hv_synic,hv_stimer  \
     -device hyperv-testdev -device pc-testdev -device isa-debug-exit,  \
     iobase=0xf4,iosize=0x4 -vnc none -serial stdio -device pci-testdev \
     -machine accel=kvm -kernel x86/hyperv_stimer.flat

Results in:

Hyper-V SynIC (requested by 'hv-synic' cpu flag) requires Hyper-V VP_INDEX
 ('hv-vpindex')
qemu-system-x86_64: kvm_init_vcpu failed: Function not implemented

Fix the configuration.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Reviewed-by: Roman Kagan <rkagan@virtuozzo.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

According to section "Checks on VMX Controls" in Intel SDM vol 3C, the
following check needs to be enforced on vmentry of L2 guests:

    If the "activate VMX-preemption timer" VM-execution control is 0, the
    the "save VMX-preemption timer value" VM-exit control must also be 0.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Mihai Carabas <mihai.carabas@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Fix for s390x interrupt program status words

Let's use the svc psw instead of the mcck psw for svc interrupts
and name it supervisor call. Also we exchange the io int psw for the
right one.

Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>

According to section "Checks on VMX Controls" in Intel SDM vol 3C, the
following check needs to be enforced on vmentry of L2 guests:

  If the "unrestricted guest" VM-execution control is 1, the "enable EPT"
  VM-execution control must also be 1.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Mihai Carabas <mihai.carabas@oracle.com>
Reviewed-by: Mark Kanda <mark.kanda@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

When testing MMIO interface to APIC we need to make sure that APIC is in
xAPIC mode (and not x2APIC). KVM started enforcing this since commit
d1766202779e ("x86/kvm/lapic: always disable MMIO interface in x2APIC
mode").

While the 'clean' fix would be to separate L2's APIC from L1's and put
it to xAPIC mode or create a different MMIO mapping just for the test
we lack the required infrastructure in vmx library. As a quick band-aid
put L1's APIC to xAPIC mode for both EPT A/D enabled and disabled tests,
it seems we don't require x2APIC for anything.

Reported-by: kernel test robot <rong.a.chen@intel.com>
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

According to section "Checks on VMX Controls" in Intel SDM vol 3C, the
following check needs to be enforced on vmentry of L2 guests:

    If the "enable PML" VM-execution control is 1, the "enable EPT"
    VM-execution control must also be 1. In addition, the PML address
    must satisfy the following checks:

      * Bits 11:0 of the address must be 0.
      * The address should not set any bits beyond the processor's
	physical-address width.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Mark Kanda <mark.kanda@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Test a single-step trap delivered by hardware to set expectations, and
then test a single-step trap synthesized by L0 to see if those
expectations are met. Single-step traps in simulated MOVSS-shadow are
tested as well.

As a bonus, test a single-step trap in a transactional region to set
expectations for that unusual case as well.

Signed-off-by: Jim Mattson <jmattson@google.com>
Reviewed-by: Peter Shier <pshier@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

When L1 intercepts #NM exceptions encountered in L2, the #NM exception
should always be reflected from L0 to L1.

Signed-off-by: Jim Mattson <jmattson@google.com>
Reviewed-by: Peter Shier <pshier@google.com>
Reviewed-by: Liran Alon <liran.alon@oracle.com>
Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

This test aims to verify that when entering a guest in HLT activity
state but with a pending interrupt in RVI, the guest is in fact not
halted and an interrupt is indeed injected.

For more information, see commit message of kernel patch "KVM: nVMX:
Wake blocked vCPU in guest-mode if pending interrupt in virtual
APICv".

Reviewed-by: Nikita Leshenko <nikita.leshchenko@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Should not change semantics.

Reviewed-by: Nikita Leshenko <nikita.leshchenko@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Reviewed-by: Nikita Leshenko <nikita.leshchenko@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Add test similar to previous patch ("x86: VMX: Verify do not lose
pending interrupt queued before entering guest") but when guest
is configured with HLT activity-state.

Reviewed-by: Nikita Leshchenko <nikita.leshchenko@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

This patch test the issue fixed by KVM commit "KVM: nVMX: Fix loss of
pending event before entering L2". The test aim to verify that a pending
interrupt while interrupts are disabled is dispatched when we enter into
VMX guest instead of being lost.

The test configures VMCS to intercept external-interrupts and then
queue an interrupt by disabling interrupts and issue a self-IPI.
At this point, we enter guest and we expect CPU to immediately exit
guest on external-interrupt. To complete the test, we then re-enable
interrupts, verify interrupt is dispatched and re-enter guest to verify
it completes execution.

Reviewed-by: Nikita Leshchenko <nikita.leshchenko@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

According to section "Checks on VMX Controls" in Intel SDM vol 3C, the
following check needs to be enforced on vmentry of L2 guests:

    If the “enable EPT†VM-execution control is 1, the EPTP VM-execution
    control field must satisfy the following checks:

      — The EPT memory type (bits 2:0) must be a value supported by the
        processor as indicated in the IA32_VMX_EPT_VPID_CAP MSR.
      — Bits 5:3 (1 less than the EPT page-walk length) must be 3,
        indicating an EPT page-walk length of 4.
      — Bit 6 (enable bit for accessed and dirty flags for EPT) must be
        0 if bit 21 of the IA32_VMX_EPT_VPID_CAP MSR is read as 0,
	indicating that the processor does not support accessed and dirty
        flags for EPT.
      — Reserved bits 11:7 and 63:N (where N is the processor’s
        physical-address width) must all be 0.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Message-Id: <20180919234238.26034-2-krish.sadhukhan@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

With these compiler flags, we can be sure that the implementation really
matches the prototypes in the headers.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <1538123582-17442-5-git-send-email-thuth@redhat.com>
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Include the right header in mmu.c to make sure that the implementations
match the prototypes, and avoid old-style declaration in float.h.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <1538123582-17442-4-git-send-email-thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

To be able to compile with -Wmissing-prototypes, we also need prototypes
for functions that are called from assembler code. We put the prototypes
into the .c files and not into header files here, since these functions
are not called from other .c files.
While we're at it, also mark some more functions as static in these
files which are only used locally.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <1538123582-17442-3-git-send-email-thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

This makes the code compilable with the compiler flags -Wstrict-prototypes
and -Wmissing-prototypes.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <1538123582-17442-2-git-send-email-thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Since commit 96d79976 kvm-unit-tests can not be compiled on
s390x anymore. The compiler complains:

lib/s390x/io.c: In function ‘exit’:
lib/s390x/io.c:57:1: error: ‘noreturn’ function does return [-Werror]

Let's make sure that the function can really not return anymore
(i.e. also do not return anymore in case SIGP is broken for example).

Fixes: 96d79976
Reported-by: Lukáš Doktor <ldoktor@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <1537858200-15083-1-git-send-email-thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

As I missed some mails that introduced problems on s390 and their
fixes, this might help to broaden review coverage.

Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Suggested-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20180927112835.134812-1-frankja@linux.ibm.com>
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

We need the information about which of the checks failed if there are
more than one and the prefixes provide that.

Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20180919131414.6192-1-frankja@linux.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

arm/arm64 patches ready for master

Shih-Wei Li authored Sep 04, 2018 and Andrew Jones committed Sep 21, 2018

Here we provide the support for measuring various micro level
operations on arm64. Measurements are currently obtained using
timer counters. Further modifications in KVM will be required
to support timestamping using cycle counters, as KVM now disables
accesses to the PMU counters from the VM.

Signed-off-by: Shih-Wei Li <shihwei@cs.columbia.edu>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Signed-off-by: Andrew Jones <drjones@redhat.com>
Acked-by: Christoffer Dall <christoffer.dall@arm.com>
Tested-by: Christoffer Dall <christoffer.dall@arm.com>
Tested-by: Shih-Wei Li <shihwei@cs.columbia.edu>

Andre Przywara authored Jul 20, 2018 and Andrew Jones committed Sep 20, 2018

Some tests for the ITARGETS registers.
Bits corresponding to non-existent CPUs must be RAZ/WI.
These registers must be byte-accessible, also check that accesses beyond
the implemented IRQ limit are actually read-as-zero/write-ignore.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

Andre Przywara authored Jul 20, 2018 and Andrew Jones committed Sep 20, 2018

Some tests for the IPRIORITY registers. The significant number of bits
is IMPLEMENTATION DEFINED, but should be the same for every IRQ.
Also these registers must be byte-accessible.
Check that accesses beyond the implemented IRQ limit are actually
read-as-zero/write-ignore.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

Andre Przywara authored Jul 20, 2018 and Andrew Jones committed Sep 20, 2018

This adds an MMIO subtest to the GIC test.
It accesses some generic GICv2 registers and does some sanity tests,
like checking for some of them being read-only.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

Andre Przywara authored Jul 20, 2018 and Andrew Jones committed Sep 20, 2018

exit() and abort() are functions that never return, and (at least)
GCC has an attribute to flag those functions accordingly. This allows
the compiler to do further optimizations and to omit various warnings
about uninitialized variables, for instance.
Since the actual "play-dead" function is in (inline) assembly, the
compiler does not recognize its fatal nature, so help it with the
__builtin_unreachable() hint.
Flag the prototypes of our fatal functions accordingly.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

Andre Przywara authored Jul 16, 2018 and Andrew Jones committed Sep 20, 2018

So far we were only testing the CVAL register. Add a test which programs
a (relative) TVAL value to check this functionality as well.
Also we go into WFI and wait for the interrupt to release us from it.
The timer tests are run with a 2 second timeout on the host side, so
that any failure in coming back would be covered.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

Andre Przywara authored Jul 16, 2018 and Andrew Jones committed Sep 20, 2018

The ARM arch timer features the CVAL register, which holds an absolute
value that is compared against the counter value.
But there is also the TVAL register, which is defined as (CVAL - counter),
and can be used to program or read relative timeouts.

Add accessors for the TVAL register, to be able to read and write them
easily later.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>

The gic-ipi tests started crashing in a strange way after
commit 9064d89b ("kvm-unit-tests: unlock before calling
return"). Eventually I narrowed it down to the NR_CPUS change
being the problem. I still don't understand what's going on,
but NR_CPUS=511 works and NR_CPUS=512 doesn't. I don't have
time to debug this further right now, so this is just a
temporary hack that appears to fix the regression.

Signed-off-by: Andrew Jones <drjones@redhat.com>

Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

./run_tests.sh
)ASS apic-split (50 tests;
)ASS ioapic-split (19 tests;
)ASS apic (50 tests;
)ASS ioapic (19 tests;
)ASS smptest (1 tests;
)ASS smptest3 (1 tests;

The problem come from commit 0f4f2acb
(x86: io: force carriage return on \n put to serial port). It maybe output
well in real hardware, but it let outputs to file with '\r'.

Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>

We need to support at least two redistributor regions in order to
support more than 123 vcpus (we select 8 because that should be
plenty). Also bump NR_CPUS to 512, since that's what KVM currently
supports.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Tested-by: Christoffer Dall <christoffer.dall@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

According to section "Checks on VMX Controls" in Intel SDM vol 3C, the
following check needs to be enforced on vmentry of L2 guests:

    If the “enable VPID†VM-execution control is 1, the value of the
    of the VPID VM-execution control field must not be 0000H.

Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Mark Kanda <mark.kanda@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Fix this spelling mistake.

Suggested-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Liran Alon <liran.alon@oracle.com>
Message-Id: <20180905232800.10318-1-liran.alon@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

When '\n' (line feed) is put to serial port, put '\r' (carriage return) as
well. This makes the serial port output to look properly (without stairs) at
real hardware. Also the output looks well at QEMU/KVM and BOCHS emulators.

Signed-off-by: Eugene Korenevsky <ekorenevsky@gmail.com>
Message-Id: <20180721185915.GA21451@vnote>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

These changes make serial controller working at real hardware and BOCHS:
- Disable interrupts
- Set up LCR, FCR, MCR properly

Signed-off-by: Eugene Korenevsky <ekorenevsky@gmail.com>
Message-Id: <20180721185657.GA21275@vnote>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>