x86: Align incw instruction to avoid split lock

A split lock is any atomic operation whose operand crosses two cache
lines. Since the operand spans two cache lines and the operation must
be atomic, the system locks the bus while the CPU accesses the two cache
lines. The bus lock operation is heavy weight and can cause
severe performance degradation.

Here's the log when run x86 test cases:
[ 3572.765921] x86/split lock detection: #AC: qemu-system-x86/24383
took a split_lock trap at address: 0x400306

Root caused 'cpu_online_count' spans two cache lines,
"lock incw cpu_online_count" instruction causes split lock.
'cpu_online_count' is the type of word(two bytes) and
therefore it needs to be aligned to 2 bytes to avoid split lock.

Signed-off-by: Junming Liu <junming.liu@intel.com>
Message-Id: <20220124111444.12548-1-junming.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>