- Feb 15, 2019
-
-
Pete Batard authored
Documentation is split between general plaform data and OS testing and installation details. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Pete Batard authored
Adds the .dec/.dsc/.fdf needed to build the platform firmware. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
The Raspberry Pi 3 uses a dedicated Synopsys DesignWare USB Host driver to interface with various USB peripherals, including the onboard NIC. This driver, which is based on the Android OpenPlatformPkg implementation, provides support for that. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
The libraries decide and set the boot order between UEFI Shell, SD media and/or USB media and allow for user configuration and override. Stale boot options (non present media) are automatically removed on boot. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
The BCM283x family includes two SD card controllers, the second one being the "internal" SD HOST controller. This driver implements support for this one. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
The BCM283x family includes two SD card controllers, one being an Arasan SDHCI compliant controller. This driver implements support for this one. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
This implements the MMC Host protocol, which is used by the two concurrent SD interface drivers that the Raspberry Pi 3 supports. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
This driver serves the device tree that is either embedded in the firmware volume or was provided through config.txt. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
Since the Raspberry Pi doesn't have a NVRAM, this driver is used to store non-volatile user configuration settings into the firmware volume itself. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
Implements the graphic console (extended text output) needed for user interaction. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
Implements the EFI_GRAPHICS_OUTPUT_PROTOCOL for the Raspberry Pi platform, through framebuffer, including resolution querying and screenshot support. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
Static SMBIOS Table for the ARM platform, derived from EmulatorPkg. Implements SMBIOS 2.7.1 required structures. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
Provides the user-visible configuration options for the firmware UI. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
Implements the base driver that is used to provide or set platform specific configuration data. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
A platform helper library, relying on low level Mailbox messaging between the CPU and VideoCore to obtain current platform information, that is used by various services and drivers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
The memory init library ensures that relevant memory regions are reserved on boot. The reset library supports the ResetSystem runtime call using PSCI and signals the gRaspberryPiEventResetGuid event group on reset, which we need to save modified configuration vars to NVRAM. Note that we tried to drop ResetLib altogether, and use the reset notification event provided by the EDK2, but this results in Linux kernel panics, for which we have no workaround. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
These ACPI tables were mostly derived or copied from the MS-IoT ones. This means that they are targetting Windows OSes, rather than Linux ones, and aren't ACPI compliant, especially when it comes to their descriptors. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
This library is meant to be used by Bcm283x-based platforms, such as the Raspberry Pi, to control the GPIO port pins on said platform. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Pete Batard authored
This currently only implements support for the architected timer interrupts on the per-CPU interrupt controllers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Pete Batard <pete@akeo.ie> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by:
Jeremy Linton <jeremy.linton@arm.com>
-
Ard Biesheuvel authored
AArch64 binutils support AArch32 seamlessly when running natively, which allowed us to drop the -I objcopy argument specifying that the input format is elf64-little, which is no longer accurate now that the module can be built in 32-bit mode as well (which makes no difference whatsoever given that the resulting binary image is only a set of stage2 page tables) The same does not apply to binutils hosted on x86, so add back the appropriate input format depending on the target type. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by:
Leif Lindholm <leif.lindholm@linaro.org> Tested-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
- Feb 11, 2019
-
-
Leif Lindholm authored
Use EFI variable attributes from Uefi/UefiMultiPhase.h in PlatformDxe .vfr rather than local definitions. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org>
-
- Jan 30, 2019
-
-
Grzegorz Jaszczyk authored
The memory controller registers are marked as secure in the latest ARM-TF for Armada SoCs. It is available however get the DRAM information via SiP services in the EL3, so use it instead of accessing the registers directly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Grzegorz Jaszczyk authored
For upcomming patch there is need to get AP806 base, provide required getter function for it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Marcin Wojtas authored
Marvell firmware allows to use SiP services other than for ComPhy handling. In order to avoid spreading the SMC ID's definitions across many files, introduce common header for that purpose. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Marcin Wojtas authored
Recent changes in the ARM-TF configure its runtime serices region as protected, hence the hitherto PEI stack base address (0x41F0000) violated it. Additional region needs to also be reserved to cover OP-TEE In order to fix this, add more regions which are non-accessible by the OS to cover: * the ARM-TF (0x4000000 - 0x4200000) * OP-TEE (0x4400000 - 0x5400000) * additional reserved region (0x4200000 - 0x4400000) Describe regions with the new PCDs and set the PEI stack base address in the latter (0x43F0000). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Marcin Wojtas authored
Extract reserving memory region in the Hob list into a separate routine. It is a preparation for adding multiple of such regions in a following patch. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
- Jan 25, 2019
-
-
Jagadeesh Ujja authored
Include the HobLib, MmServicesTableLib and MemoryAllocationLib libraries on Sgi platforms. These will be consumed by MM_STANDALONE drivers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Jagadeesh Ujja <jagadeesh.ujja@arm.com> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org>
-
- Jan 24, 2019
-
-
Star Zeng authored
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1323 Merge EmuVariable and Real variable driver. The real variable driver has been updated to support emulated variable NV mode and the EmuVariableRuntimeDxe will be removed later, so use merged variable driver for emulated NV mode. NOTE: FaultTolerantWriteDxe is not needed at all for emulated NV mode, so remove FaultTolerantWriteDxe including. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Star Zeng <star.zeng@intel.com> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org>
-
Star Zeng authored
For https://bugzilla.tianocore.org/show_bug.cgi?id=1323 , EmuVariable will be merged to real variable driver, and EmuVariableRuntimeDxe will be removed finally. As D03 and D05 are using the real variable driver VariableRuntimeDxe, this patch removes EmuVariableRuntimeDxe including in D03.dsc and D05.dsc directly. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Star Zeng <star.zeng@intel.com> Reviewed-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org>
-
- Jan 21, 2019
-
-
Ard Biesheuvel authored
This implements support for UEFI secure boot on DeveloperBox using the standalone MM framework. This moves all of the software handling of the UEFI authenticated variable store into the standalone MM context residing in a secure partition. Note that SynQuacer as configured today is not a truly secure platform, since the NOR flash registers are accessible to the non-secure world. However, from a software point of view, all of the required pieces are in place. (In particular, it is no longer possible for the OS to stub out authentication checks in the validation code residing in RuntimeServicesCode regions) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Ard Biesheuvel authored
Create a pair of .DSC/.FDF files that describe the components and the firmware volumes and flash device that will be dispatched into a secure partition in the secure world to control the UEFI secure variable store. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Ard Biesheuvel authored
We are going to add a separate .DSC/.FDF combo for the standalone MM components. So put all the pieces we will share in an include file that both .DSC files can include. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Ard Biesheuvel authored
This code may execute in SMM context, where unaligned accesses are not permitted. So use ReadUnaligned32() instead of performing a direct UINT32* cast. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Ard Biesheuvel authored
Implement a variant of the FIP006 NOR flash driver that can execute in standalone MM context. This is the foundation for hosting the EFI authenticated variable store in the secure world. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Ard Biesheuvel authored
In preparation of creating a SMM version of the FIP006 NOR flash driver, refactor the existing pieces into a core driver, the FVB methods and the DXE instantiation code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
- Jan 17, 2019
-
-
Marcin Wojtas authored
To abstract the initialization required for non-discoverable devices, which is often platform specific (e.g. enable GPIO-driven power supply), introduce a NonDiscoverableInitLib for use by the NonDiscoverable code, for which each platform can supply its own version. Add XHCI power supply (so called 'VBUS') enabling routines for supported platforms (Armada70x0Db, Armada80x0Db, Armada80x0McBin). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Marcin Wojtas authored
Enable building new GPIO drivers before adding VBUS pins handling. Update relevant boards .dsc files with IO expander information. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Marcin Wojtas authored
Marvell Armada 7k/8k-based platforms may use Pca95xx to extend amount of the GPIO pins. This patch introduces support for them. The new driver implements a generic EMBEDDED_GPIO protocol. In order to ease description of used PCA9XXX controllers add a common enum type. It can be used e.g. in the board description library to specify the expander model on a board (instead of passing a raw number). Update relevant libraries. Driver is based on initial work done by Allen Yan <yanwei@marvell.com>. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Marcin Wojtas authored
Hitherto I2c solution used same macros, defined in multiple places. Move them to a new common header. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-
Marcin Wojtas authored
Marvell Armada 7k/8k SoCs comprise integrated GPIO controllers, one in AP806 and two in each south bridge hardware blocks. This patch introduces support for them. The new driver implements a generic EMBEDDED_GPIO protocol. In order to ease description of used GPIO pins and controllers of the Armada 7k8k platforms, add a common enum type. Based on original work of Jing Hua <jinghua@marvell.com>. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Leif Lindholm <leif.lindholm@linaro.org>
-