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Draft: SME Matmul Micro-kernel F16 <- (QSI8D32) LHS x (QAI4C32) RHS

Anitha Raj requested to merge f16_qai4c32p_sme into main
  • Matrix multiplication (1xN) micro-kernels to compute the matrix multiplication of dynamically quantized symmetric signed 8-bit integer with per-block quantization (QSI8D32) LHS matrix and quantized asymmetric 4-bit signed integer with per-block quantization (QAI4C32) RHS matrix and the accumulation of the result into a half-precision (F16) output, optimized for SME2 technology
  • Matrix multiplication (MxN) micro-kernels to compute the matrix multiplication of dynamically quantized symmetric signed 8-bit integer with per-block quantization (QSI8D32) LHS matrix and quantized asymmetric 4-bit signed integer with per-block quantization (QAI4C32) RHS matrix and the accumulation of the result into a half-precision (F16) output, optimized for SME2 technology

Signed-off-by: Anitha Raj anitha.raj@arm.com

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