Skip to content

Matmul Micro-kernel(1xN) F32/F16 <- (QSI8D32) LHS x (QAI4C32) RHS

Anitha Raj requested to merge qai4c32_dot_gemv into main
  • Matrix multiplication (1xN) micro-kernels to compute the matrix multiplication of dynamically quantized symmetric signed 8-bit integer with per-block quantization (QSI8D32) LHS matrix and quantized asymmetric 4-bit signed integer with per-block quantization (QAI4C32) RHS matrix and the accumulation of the result into a single-precision (F32) and half-precision (F16) output, optimized for FEAT_DotProd and packing parameter kr = 8.

Signed-off-by: Anitha Raj anitha.raj@arm.com

Merge request reports