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* GEMM and GEMV micro-kernels to compute the matrix multiplication of dynamically quantized 8-bit integer (QAI8DX) LHS matrix and quantized 4-bit integer (QSI4CX) RHS matrix and the accumulation of the result into a single-precision (F32) output, optimized for SME2 technology. Signed-off-by:
Mohamad Najem <mohamad.najem@arm.com> Signed-off-by:
Anitha Raj <anitha.raj@arm.com> Signed-off-by:
Michael Kozlov <michael.kozlov@arm.com>
Signed-off-by: Thomas Bamelis <thomas.bamelis@arm.com> Reviewed-by:
Anton Bondarenko <anton.bondarenko@arm.com>
Reviewed-by: 
Jakub Sujak <jakub.sujak@arm.com>
Approved-by: Jakub Sujak <jakub.sujak@arm.com>3a9a21ca
To find the state of this project's repository at the time of any of these versions, check out the tags.
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