examples: Enable instruction cache on non-secure side

Instruction cache memory is enabled on the application
side which speeds up the execution of non-secure code
This is needed as in the case of CS310 FPGA platform
the application is being ran from the QSPI memory
which is very slow, so to speed things up we need to
enable the instruction cache on the non-secure side.

Signed-off-by: Ahmed.Ismail <Ahmed.Ismail@arm.com>