- Nov 19, 2019
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Paul Beesley authored
Some existing RST files contain formatting errors that will cause Sphinx to generate warnings. Change-Id: I714136d1ea5b645eaa55dd304fb56d5b5fd18ee1 Signed-off-by:
Paul Beesley <paul.beesley@arm.com>
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Paul Beesley authored
Adding the same type of Sphinx config that is used for the main TF-A repo. Contains the config itself, a Makefile to build the docs directly under the /docs directory (not tied to top-level Makefile by design), an index page and the TF.org logo as used in TF-A. Change-Id: Ifd5c83533fbad457b448a52f42a2f12303887f4a Signed-off-by:
Paul Beesley <paul.beesley@arm.com>
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- Nov 13, 2019
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Sandrine Bailleux authored
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- Nov 05, 2019
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Soby Mathew authored
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- Oct 30, 2019
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Petre-Ionut Tudor authored
This patch adds Aarch32 support to the PMU counter leak tests. These tests attempt to profile the Secure world by configuring EL0 system registers such that the PMU is told to increment counters at Secure EL1, Secure EL2 and EL3. The tests fail if useful information was leaked. The Secure world defends against this type of attack with a combination of configuring EL3 system registers and saving/restoring EL0 PMU registers. Exactly which defense is employed depends on the architecture version. Signed-off-by:
Petre-Ionut Tudor <petre-ionut.tudor@arm.com> Change-Id: I2dcc9e786a18d9859ac089f8008b060d277bee3a
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- Oct 22, 2019
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Sandrine Bailleux authored
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- Oct 21, 2019
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Sandrine Bailleux authored
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- Oct 18, 2019
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Deepika Bhavnani authored
Extend SYSTEM_OFF to involve more than just the lead CPU. The typical way to use SYSTEM_OFF is to use calls to CPU_OFF on all online cores except for the last one, which instead uses SYSTEM_OFF. test_system_off_cpu_other_than_lead() case is added to turn on any random CPU other then lead CPU and perform SYSTEM_OFF from the CPU which was turned ON. Signed-off-by:
Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Ice62d0e7ef0db63ccb030e8dc1a83d9bd55e70f2
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- Oct 16, 2019
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Madhukar Pappireddy authored
Also updated the readme.rst file with changes in v2.2 release Signed-off-by:
Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: I93e21473f4048867c29b6e0d9e854d07d3f71782
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- Oct 15, 2019
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Sandrine Bailleux authored
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Sandrine Bailleux authored
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- Oct 14, 2019
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Deepika Bhavnani authored
requested_irq_received is used to confirm if the CPU is woken by IRQ, it is set as part of `requested_irq_handler`. Default it should be cleared for all CPU's under test, un-intialized value resulted in random failure based on previous state of variable. Signed-off-by:
Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Ia3af99a11f3297c2e8fc1ef52e7f18107e2fdfc8
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- Oct 10, 2019
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Petre-Ionut Tudor authored
This patch fixes a bug where integer underflow causes the tests to wrongly fail. Since event counts are register values, they are unsigned in TFTF. When the event count is less on the SMC being profiled than the baseline SMC event count, subtraction causes an underflow which goes beyond the allowed deviation and makes the test fail. Signed-off-by:
Petre-Ionut Tudor <petre-ionut.tudor@arm.com> Change-Id: I58bc18ca4afd28b6d1b1354a9af9f70d616d2c32
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Madhukar Pappireddy authored
Signed-off-by:
Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: I15f881d89bcb165ab41503fdcbcc1a1abcbb36c5
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- Oct 08, 2019
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Sandrine Bailleux authored
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Alexei Fedorov authored
This patch provides the following feature and makes modification listed below: - ARMv8.3-PAuth tests now check for all keys being in use (e.g. APIAKey when the test suite is built with `ENABLE_PAUTH=1` option) and program new key values otherwise. Signed-off-by:
Alexei Fedorov <Alexei.Fedorov@arm.com> Change-Id: Ifa4a288274822029da585073563c68a1434f5de7
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Sandrine Bailleux authored
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Sandrine Bailleux authored
TF-A now has support for the new Memory Tagging Extension in ARMv8.5, see commit 91624b7fed52 ("Merge changes from topic "jc/mte_enable" into integration"). This patch creates and enables tests to ensure that the extension is being properly enabled and that no undesired leakages occur. Change-Id: I7708fb23a12e2f35a97533f296aaa53db776ddd2 Signed-off-by:
Justin Chadwell <justin.chadwell@arm.com> Signed-off-by:
Sandrine Bailleux <sandrine.bailleux@arm.com>
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- Oct 04, 2019
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Soby Mathew authored
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Soby Mathew authored
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Alexei Fedorov authored
This patch provides the following features and makes modifications listed below: - `plat_init_apiakey()` function is replaced with `init_apkey()` which returns 128-bit value and uses Generic timer physical counter value to increase the randomness of the generated key. The new function can be used for generation of all ARMv8.3-PAuth keys. - Source file `pauth.c` moved from `plat/common/aarch64` to `lib/extensions/pauth/aarch64` folder which contains PAuth specific code. - Individual APIAKey key generation for each CPU on every warm boot. - Per-CPU storage of APIAKey added in `tftf_suspend_context` structure. - APIAKey key is saved/restored in arch context on entry/exit from suspended state. - Added `pauth_init_enable()` function which generates, programs and enables APIAKey in EL1/EL2. - Changes in documentation related to ARMv8.3-PAuth support. Signed-off-by:
Alexei Fedorov <Alexei.Fedorov@arm.com> Change-Id: I964b8f964bb541cbb0b2f772cb0b07aed055fe36
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Soby Mathew authored
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Petre-Ionut Tudor authored
This patch introduces a series of tests that try to leak PMU counter values from EL3 and S_EL1. PMU events used: - CPU cycles via PMU counter PMCCNTR_EL0 - Retired writes to PC via PMU counter PMEVCNTR0_EL0 This AARCH64-specific patch is for security fix: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/1789 The AARCH32 versions of these tests will be in a future patch. Signed-off-by:
Petre-Ionut Tudor <petre-ionut.tudor@arm.com> Change-Id: Ib27948edadde30272e59a9ab208543703fa078bd
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- Oct 03, 2019
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Sandrine Bailleux authored
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- Oct 01, 2019
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Deepika Bhavnani authored
Signed-off-by:
Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: Ie946e83d4365679d6daa1d3b25142a9380cffe2f
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- Sep 30, 2019
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Alexei Fedorov authored
This patch renames folder and source file names according to match with TF-A naming: - `ptrauth` folder in `tftf\tests\extensions' renamed to `pauth`, - `test_ptrauth.c` source file to `test_pauth.c` Signed-off-by:
Alexei Fedorov <Alexei.Fedorov@arm.com> Change-Id: Ida47e175e158e77e33270ee93ba6b3104eb0b5db
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Sandrine Bailleux authored
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- Sep 27, 2019
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Sandrine Bailleux authored
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- Sep 26, 2019
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Imre Kis authored
Trusted OSes should preserve or fill by zeroes the values of x1-x3 registers across an SMC call in order to prevent data leakage. The behaviour of OP-TEE regarding to this has changed recently from preserving values to filling them by zeroes. This patch utilitizes the newly added allow_zeros[] parameter of the smc_check_match function to make the tests compatible with OP-TEE commit 6e558fa94ab0 or later. Signed-off-by:
Imre Kis <imre.kis@arm.com> Change-Id: I52ddfb69261833a3fba76c5f89d27d1ea13043b0
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- Sep 25, 2019
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Sandrine Bailleux authored
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- Sep 24, 2019
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Madhukar Pappireddy authored
Some platforms with A76 core do not require the dynamic mitigation using SMCCC_ARCH_WORKAROUND_2 call. Test which verifies such workaround can be skipped in such scenario. Signed-off-by:
Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: Iacf27da7181828a2fd1166bd6eeb069ba27da0c5
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- Sep 23, 2019
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Lauren Wehrmeister authored
Creating new test suite for System shutdown and stats after shutdown tests separate from the other manual tests since the others have been automated for some platforms. This test suite is intended to be used for manual testing for the upcoming release. Signed-off-by:
Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I3725b28528696fa51d4c1f3af60f8a6e61e1a702
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- Aug 16, 2019
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Paul Beesley authored
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- Aug 08, 2019
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Lauren Wehrmeister authored
Creating a new xml to separate Juno TFTF reboot tests by those that are expected to pass and those that aren't (2 RESET2 tests). Signed-off-by:
Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I101de828aeedd33e0601597b70e00056b884ceba
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- Aug 02, 2019
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Sandrine Bailleux authored
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Sandrine Bailleux authored
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- Aug 01, 2019
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Ambroise Vincent authored
This prevents the execution of the read-only data. This is done in a similar way in TF-A when the build flag SEPARATE_CODE_AND_RODATA is enabled. The build flag is probably not needed in TF-A Tests. Change-Id: I2bdc0237c00377beb2febeb47207770c85036192 Signed-off-by:
Ambroise Vincent <ambroise.vincent@arm.com>
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Alexei Fedorov authored
This patch pick up the following changes from TF-A: - Fix for SCTLR bit definitions in 'include/lib/aarch64/arch.h` - Introduction of 128-bit integer types int128_t and uint128_t in 'include/lib/libc/aarch64/stdint.h_` Signed-off-by:
Alexei Fedorov <Alexei.Fedorov@arm.com> Change-Id: I7e7b1b6d8f79eeb6b16df2ce2bea07c5748d1216
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- Jul 31, 2019
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Sandrine Bailleux authored
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Sandrine Bailleux authored
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