Manish Badarkhe authored Feb 23, 2022 and Manish Badarkhe committed Oct 05, 2022

DRTM implementation maps the DLME data region provided by the
DCE-preamble in BL31, hence increased MAX_XLAT_TABLES entries
count.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: I5f0ac69e009c4f81d3590fdb1f4c0a7f73c5c99d

Lucian Paul-Trifu authored Feb 23, 2022 and Manish Badarkhe committed Oct 05, 2022

The stack size of BL31 has been increased to accommodate the
introduction of mbedTLS support for DRTM.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: Id0beacf4df553af4ecbe714af20e71604ccfed59

Lucian Paul-Trifu authored Jun 22, 2022 and Manish Badarkhe committed Oct 05, 2022

Added necessary platform hooks for DRTM DMA protection.
These calls will be used by the subsequent DRTM implementation
patches.
DRTM platform API declarations have been listed down in a
separate header file.

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com>
Change-Id: Ib9726d1d3570800241bde702ee7006a64f1739ec

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I77d2d3c5ac39a840b768f84f859d76b3965749aa

* changes:
  feat(mediatek): move lpm drivers back to common
  feat(mt8188): add cpu_pm driver
  fix(mt8188): refine c-state power domain for extensibility

Starting with QEMU v3.1.0 (Dec 2018), QEMU's TCG emulation engine supports
the SVE architecture extension. In QEMU v7.1.0 (Aug 2022) it also gained
SME support.

As it stands today, running TF-A under QEMU with "-cpu max" makes Linux
hang, because SME and SVE accesses trap to EL3, but are never handled
there. This is because the Linux kernel sees the SVE or SME feature bits,
and assumes firmware has enabled the feature for lower exception levels.
This requirement is described in the Linux kernel booting protocol.

Enable those features in the TF-A build, so that BL31 does the proper
EL3 setup to make the feature usable in non-secure world.
We check the actual feature bits before accessing SVE or SME registers,
so this is safe even for older QEMU version or when not running with
-cpu max. As SVE and SME are AArch64 features only, do not enable them
when building for AArch32.

Change-Id: I5b718eb298a0bbcf36244479e8d42e54a2faca61
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

* changes:
  feat(stm32mp1): add plat_report_*_abort functions
  feat(debug): add helpers for aborts on AARCH32
  feat(debug): add AARCH32 CP15 fault registers

Hardware video decoding is not working after enabling EMI MPU protection
for SCP.

According to coreboot DEVAPC setting, SCP belongs to domain 4 instead of
domain 3. So correct the permission setting.

BUG=b:249954378
TEST=play video and see codec irq count is incrementing.

Signed-off-by: Yidi Lin <yidilin@chromium.org>
Change-Id: If71de3eabf8682909f96924c159aa92f25deb96c

* changes:
  refactor(sgi): rename RD-Edmunds to RD-V2
  refactor(cpu): use the updated IP name for Demeter CPU

Claus Pedersen authored Sep 12, 2022 and joannafarley-arm committed Oct 04, 2022

Moving putchar() out of libc and adding a weak dummy
implementation in libc.

This is to remove libc's dependencies to the platform
driver.

Signed-off-by: Claus Pedersen <claustbp@google.com>
Change-Id: Ib7fefaec0babb783def614ea23521f482fa4a28a

In order to sync drivers with MediaTek internal code base, we move lpm
drivers back to common folder.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I1066e092febe0abb9782a46f668613e137737c88

- Add cpu_pm driver for CPU idle and SMP flow.
- Add SMP driver for CPU power on/off control.
- Add CPC driver to handle CPU powered on/off in CPU suspend.
- Add mbox driver for tinysys support.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com>
Change-Id: I20141474e1c43cdfacb9f2c6a2285721e50a617c

1. MT8188 uses "suspend to RAM" instead of "suspend to idle", so
   remove s2idle state.
2. Definition c-state power domain:
    - bit[7:4] (main state id):
      1: Cluster.
      2: Mcusys.
      3: Memory.
      4: System pll.
      5: System bus.
      6: SoC 26m/DCXO.
      7: Vcore buck.
      15: Suspend.
    - bit[3:0] (reserved for state_id extension):
      4: CPU buck.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: Ibacd3d642f78726e1f1c08f18892481d2695f9e6

The new helpers are created in STM32MP1 platform for prefetch and data
aborts.
While at it, put plat_report_exception() under DEBUG flag. If DEBUG is
not set, the weak function which does the same will be used.
This plat_report_exception() function can also be simplified, as it will
no more be used to report aborts.

Change-Id: Ibe989b28e236693f317cffb0545ea0611b7bdde4
Signed-off-by: Yann Gautier <yann.gautier@st.com>

New helper functions are created to handle data & prefetch aborts
in AARCH32. They call platform functions, just like what
report_exception is doing.
As extended MSR/MRS instructions (to access lr_abt in monitor mode)
are only available if CPU (Armv7) has virtualization extension,
the functions branch to original report_exception handlers if this is
not the case.
Those new helpers are created mainly to distinguish data and prefetch
aborts, as they both share the same mode.
This adds 40 bytes of code.

Change-Id: I5dd31930344ad4e3a658f8a9d366a87a300aeb67
Signed-off-by: Yann Gautier <yann.gautier@st.com>

For an easier debug on Aarch32, in case of abort, it is useful to access
DFSR, IFSR, DFAR and IFAR CP15 registers.

Change-Id: Ie6b5a2882cd701f76e9d455ec43bd4b0fbe3cc78
Signed-off-by: Yann Gautier <yann.gautier@st.com>

The purpose of this code is to extract api_id from smc_fid but this masking
is done already in the code with using generic mask from smccc.h
(FUNCID_NUM_MASK). That's why remove FUNCID_MASK is which not needed and
actually also equal to already used FUNCID_NUM_MASK.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: I1113825baa5d9d58d9d7c5d9d5855fecf62e8d45

On one hand, there is currently no upstream platform supporting the
RSS. On the other hand, we are gradually introducing driver code for
RSS. Even though we cannot test this code in the TF-A CI right now, we
can at least build it to make sure no build regressions are introduced
as we continue development.

This patch adds support for overriding PLAT_RSS_NOT_SUPPORTED build
flag (which defaults to 1 on the Base AEM FVP) from the command
line. This allows introducing an ad-hoc CI build config with
PLAT_RSS_NOT_SUPPORTED=0, which will correctly pull in the RSS and MHU
source files. Of course, the resulting firmware will not be
functional.

Change-Id: I2b0e8dd03bf301e7063dd4734ea5266b73265be1
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

Provide a new makefile as a convenience for platform makefiles to pull
in the list of source files and headers for the RSS communication
driver.

Change-Id: I188a1a8f4e77318cdc87c3155b280090c46ce813
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

Neoverse Reference Design platform RD-Edmunds has been renamed to RD-V2
and so all corresponding references have been changed.

Signed-off-by: Joel Goddard <joel.goddard@arm.com>
Change-Id: I134f125f8ce9ec2f42988ecd742de307da936f2b

Neoverse Demeter CPU has been renamed to Neoverse V2 CPU.
Correspondingly, update the CPU library, file names and other
references to use the updated IP name.

Signed-off-by: Joel Goddard <joel.goddard@arm.com>
Change-Id: Ia4bf45bf47807c06f4c966861230faea420d088f

* changes:
  feat(stm32mp1): add early console in SP_min
  feat(st): properly manage early console
  feat(st-uart): manage STM32MP_RECONFIGURE_CONSOLE
  docs(st): introduce STM32MP_RECONFIGURE_CONSOLE
  feat(st): add trace for early console
  fix(stm32mp1): enable crash console in FIQ handler
  feat(st-uart): add initialization with the device tree
  refactor(stm32mp1): move DT_UART_COMPAT in include file
  feat(stm32mp1): configure the serial boot load address
  fix(stm32mp1): update the FIP load address for serial boot
  refactor(st): configure baudrate for UART programmer
  refactor(st-uart): compute the over sampling dynamically

Geert Uytterhoeven authored Mar 23, 2022 and Sandrine Bailleux committed Oct 03, 2022

According to the Generic Names Recommendation in the Devicetree
Specification Release v0.3, and the DT Bindings for the Renesas Reduced
Pin Count Interface, the node name for a Renesas RPC-IF device should be
"spi".  The node name matters, as the node is enabled by passing a DT
fragment from TF-A to subsequent software.

Fix this by renaming the device node in the passed DT fragment from
"rpc" to "spi".

Fixes: 12c75c88 ("feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Change-Id: Idb43353947607611331abc344f8c8ae932a20408

Since patch on libc refactoring, there is a compilation error with
STM32MP_USB_PROGRAMMER=1:
plat/st/common/stm32cubeprogrammer_usb.c:81:35: error:
 implicit declaration of function 'strnlen'
 [-Werror=implicit-function-declaration]
      length += strnlen((char *)&dfu->buffer[GET_PHASE_LEN],

The string.h header file should be included.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I1fbb2d9714cbc0d0640cb5e3c5ae8201dbfbe14e