zynqmp: Add RW access to L2ACTLR_EL1 and CPUACTLR_EL1

Arm provided error injection support. To enable this error injection,
we need to set L2DEIEN in L2ACTLR_EL1 register and L1DEIEN in
CPUACTLR_EL1 register.

This is needed for our cortexa53 edac linux driver testing.
These registers need write access from non secure EL1 i.e linux
at the time of setting the above bits.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>