- Sep 20, 2022
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Nicola Mazzucato authored
With this patch the change log is updated to contain description for new features, improvements and fixes contained in this release. Please note that some remarks have been added for the new added tool Unit Test and its implications for the contributors. Change-Id: Iac4a3bcef51d818dbfa88207d5fb857eeea0c4e7 Signed-off-by:
Nicola Mazzucato <nicola.mazzucato@arm.com>
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- Sep 16, 2022
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Vijayenthiran Subramaniam authored
Remote agentid in Chip-0's config data for Chip-1 is pointing to the local agentid's instead of the remote agentid. Fix this. Signed-off-by:
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Change-Id: I32a25de1d2a539a233d0285804c8c22273c55a6f
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Anurag Koul authored
Bump up the I2C interface timeout to the maximum value supported by the IP. This is particularly useful when communicating with slow I2C target devices. Also, reset the I2C FIFO at the start of a Tx/Rx sequence in order to clear any error state latched for a previously failed transaction. Change-Id: I3c7aa91fcc5515c41c482cdc0249b6b0024ad616 Signed-off-by:
Anurag Koul <anurag.koul@arm.com>
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- Sep 15, 2022
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Ahmed Gadallah authored
Unit tests are created for scmi_sensor_requester. Signed-off-by:
Ahmed Gadallah <ahmed.gadallah@arm.com> Change-Id: I500b7e39c91520b3f3253b6d39d5b4c2bd0eb3f6
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Ahmed Gadallah authored
Added input arguments check and a variable initialization to improve robustness. Signed-off-by:
Ahmed Gadallah <ahmed.gadallah@arm.com> Change-Id: Iff1b0ff1a3150bab8490fdf63f67384aa33f5034
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- Sep 09, 2022
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Brett Warren authored
MOCK_REPACEMENTS was accumulating strings from previously run test modules. This variable is now reset when module_common.cmake is invoked. Signed-off-by:
Brett Warren <brett.warren@arm.com> Change-Id: Ib8155fd9877d5ee060381fa249c1c2d81eee2446
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- Sep 08, 2022
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Tony Nadackal authored
Add get_cmn700_revision() to retrieve the revision number from CMN-700 peripheral id register. Use this function to print the revision number at the start of the discovery process. Signed-off-by:
Tony K Nadackal <tony.nadackal@arm.com> Change-Id: I9744c3b57bff637ad69a292d428b2b8c45e63c3a
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Tony Nadackal authored
Add get_cmn650_revision() to retrieve the revision number from CMN-650 peripheral id register. Use this function to print the revision number at the start of the discovery process. Signed-off-by:
Tony K Nadackal <tony.nadackal@arm.com> Change-Id: Ic767feedb05272077201689ee59aa06e0768ece6
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Tony Nadackal authored
Add get_cmn600_revision_name() to convert the cmn600 revision number to a matching string in TRM. During cmn600 discovery process, this revision string is logged. The definitions of the peripheral ID revision numbers have been updated. The lower 4-bits of these definitions are the same for all revisions and so these bits are discarded and converted it to an enum. This also allows better indexing into the revision string array as well. Signed-off-by:
Tony K Nadackal <tony.nadackal@arm.com> Change-Id: If59c40d14ff5c569c340cd4bbde1deda402856f7
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Tony Nadackal authored
SYS_CACHE_GRP_REGION[] registers were accessed under the condition of region_idx < NON_HASH_MEM_REG_COUNT. Since SYS_CACHE_GRP_REGION has only four registers, access to SYS_CACHE_GRP_REGION[region_idx] could lead to an out of bound access. So this patch checks the sam_type to identify the type of the region being configured and based on that, separate checks are introduced for the boundary conditions for both NON_HASH_MEM_REGION and SYS_CACHE_GRP_REGION registers. Signed-off-by:
Tony K Nadackal <tony.nadackal@arm.com> Change-Id: I0905897fdf312f8f16911e5eebc4436e45f646fb
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Tony Nadackal authored
In latest revisions of cmn600, there are five NON_HASH_TGT_NODEID registers. But last two NON_HASH_TGT_NODEID registers are implemented in a different address offset. So the cmn600 version is checked to calculate the maximum number of IO memory regions supported and decide which NON_HASH_TGT_NODEID bank needs to be programmed based on the group index. Signed-off-by:
Tony K Nadackal <tony.nadackal@arm.com> Change-Id: Ib83c3fef5d5048eb3d24ec230da6c2f535b2eccc
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- Sep 05, 2022
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Vivek Kumar Gautam authored
The base address of the SoC expansion block connected to the IO Virtualization block is changed from 0xC000_0000_0000 to 0x10_8000_0000. Correspondingly, update the memory region descriptor in the CMN-700 module config data and the mmio start/end address of the four ports of the IO virtualization block. Signed-off-by:
Vivek Gautam <vivek.gautam@arm.com> Change-Id: I44c7ec66399b276738f352d23bfd5c05dc7ceb3c
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- Sep 01, 2022
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Vijayenthiran Subramaniam authored
RD-N2 Multichip platform variant uses CCLA to CCLA direct connect mode which connects the upper link layer (ULL) of CCLA of one chip to another chip's CCLA's ULL. Hence enable this mode for all the CCG nodes in the config data. Signed-off-by:
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Change-Id: I593e78778ea599d8a9043c72d82e2f8e2082c93d
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Vijayenthiran Subramaniam authored
RD-N2 Multichip variant mesh has been updated with total CCG count of five per chip and the connections between the chips has been modified. Out of the five CCGs, four CCGs are used for the cross chip connection and one for the CXL device. This patch updates the CMN-700 CCG config data with the updated connections. Since there are only four CCG used for cross chip connections and one CCG left for CXL device, use CCG_PER_CHIP instead of RNF_PER_CHIP for calculating the HAID value of the CCG nodes to avoid overlapping HAIDs between two or more chips. Signed-off-by:
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Change-Id: I4cfde332b33606b59b247983f8acda722d2feaae
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Vijayenthiran Subramaniam authored
RD-N2 Multichip platform variant contains four CPUs (RN-Fs) per chip. Fix this count in the config data. In order to make this macro specific to the Multichip variant (Cfg2), rename this macro to RNF_PER_CHIP_CFG2. Signed-off-by:
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Change-Id: Iaab9867a97aef6a9d2d8d3333ba9cbd2a06647df
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Vijayenthiran Subramaniam authored
RAID to LDID programming in the CCG HA (CCHA hereafter) assign the LDID corresponding to the remote chip's RAID. This is used to generate the LDID for a request from an remote RN-F with RAID. The need to program this register is best explained with an example: Consider a quad chip configuration with four CMN-700 meshes connected to each other, with four RN-F per chip and with `local_ra_cnt` as 14. In this case, the RN-F RAID assignment (CCRA LDID to RAID LUT) for each chip is shown below: +------------------+ +------------------+ | Chip 0 | | Chip 1 | +--------+---------+ +--------+---------+ |RNF LDID|RNF RAID | |RNF LDID|RNF RAID | +--------+---------+ +--------+---------+ | 0 | 0 | | 0 | 14 | | | | | | | | 1 | 1 | | 1 | 15 | | | | | | | | 2 | 2 | | 2 | 16 | | | | | | | | 3 | 3 | | 3 | 17 | +--------+---------+ +--------+---------+ +------------------+ +------------------+ | Chip 2 | | Chip 3 | +--------+---------+ +--------+---------+ |RNF LDID|RNF RAID | |RNF LDID|RNF RAID | +--------+---------+ +--------+---------+ | 0 | 28 | | 0 | 42 | | | | | | | | 1 | 29 | | 1 | 43 | | | | | | | | 2 | 30 | | 2 | 44 | | | | | | | | 3 | 31 | | 3 | 45 | +--------+---------+ +--------+---------+ Each CMN-700 mesh would know the LDID of the local RN-F. When RN-F generates a snoop request, this LDID is then used to identify the RN-F's nodeid in the HN-F's `ldid_to_chi_node_id_reg`. In order to generate the LDID of a remote RN-F, RAID to LDID values are to be programmed in the CCHA raid to ldid LUT and the LDID values has to be contiguous with but above the LDID range assigned to local RN-F. When an request from an remote RN-F with a RAID arrives at the CCHA, RAID to LDID LUT is used to look up against the incoming RAID and generate LDID which would be then sent to HN-F's to look up `ldid_to_chi_node_id_reg` which would have the CCHA nodeid programmed for remote RN-Fs. Considering the above example, when RN-F with LDID 0 on the Chip 1 with RAID 14 sends a snoop request to the Chip 0, the request would arrive at Chip 0's CCHA. CCHA's raid to ldid LUT is used to generate the LDID for sending to HN-F. In this case, CCHA's rnf_exp_raid_to_ldid_reg[3]'s index 1 need to be programmed with an LDID value of 4. Currently, instead of programming the LDID values for the corresponding remote agentids (RAIDs of remote RN-Fs), the LDID values are programmed in sequence to the current chip's RAID. In the above case, on Chip 0, instead of programming the LDID value 4 for RAID 14 (expected), the LDID value 4 is programmed to the RAID 4 (actual). So when an snoop request from RAID 14 arrives the snoop request would get forwarded with LDID 14 instead of LDID 4 which would result in response forwarded to wrong CCHA (to Chip 3's HA instead of Chip 1 HA) leading to coherency issues between chips. Expected: Actual: +---------------------+ +---------------------+ | Chip 0 | | Chip 0 | +-----------+---------+ +-----------+---------+ | RNF RAID |RNF LDID | | RNF RAID |RNF LDID | +-----------+---------+ +-----------+---------+ | 14 | 4 | | 4 | 4 | | | | | | | | 15 | 5 | | 5 | 5 | | | | | | | | 16 | 6 | | 6 | 6 | | | | | | | | 17 | 7 | | 7 | 7 | +-----------+---------+ +-----------+---------+ | 28 | 8 | | 8 | 8 | | | | | | | | 29 | 9 | | 9 | 9 | | | | | | | | 30 | 10 | | 10 | 10 | | | | | | | | 31 | 11 | | 11 | 11 | +-----------+---------+ +-----------+---------+ | 42 | 12 | | 12 | 12 | | | | | | | | 43 | 13 | | 13 | 13 | | | | | | | | 44 | 14 | | 14 | 14 | | | | | | | | 45 | 15 | | 15 | 15 | +-----------+---------+ +-----------+---------+ Fix this by programming the LDID values on the correct RAID register groups. Signed-off-by:
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Change-Id: I58ecb49e5a83a647ffe3050cded0bb8a79c1d3e5
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Vijayenthiran Subramaniam authored
CCG enables connecting the CXS interface from the CCLA on one CMN‑700 to the CXS interface of the other. In this mode, the interfaces are connected without going through the lower link layer and PHY controller IP, essentially connecting the upper link layer (ULL) directly on both sides CCLA. This mode is used in simulation environments for quick system bringups. Add support to enable this mode. An option is also added in `mod_cmn700_ccg_config` structure to enable this mode through config data. Signed-off-by:
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Change-Id: If2164eb4740148a9c8b0b9e546b4d5fd70c9c25e
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Vijayenthiran Subramaniam authored
get_ldid function returns the ldid based on the state of the port aggregation. To avoid any potential buffer overflow, do boundary check of ldid value with the total CCG node count. Signed-off-by:
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Change-Id: I0c31484ccb00fa21ff25538206d27073e7fa1f41
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Vijayenthiran Subramaniam authored
When SMP mode is enabled, CCRA and CCHA link control registers are programmed with SMP mode enable bit. When enabling the CCRA and CCHA links using the same link control registers, the existing values were overwritten causing the SMP mode to be disabled. Fix this by doing `bitwise OR` when setting the enable bit. Signed-off-by:
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Change-Id: Ie582335bae055d913e095e5493193a9254efbffe
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Vijayenthiran Subramaniam authored
CXRA and CXHA are CCIX node type. CMN-700 CCG module uses CCRA and CCHA which are CXL node types. Rename all instances of CXRA and CXHA to CCRA and CCHA respectively in the comments and print statements. This patch does not cause any functionality change. Signed-off-by:
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Change-Id: Ib0d578927fe2da34add8c70dd8660de3c719a62a
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- Aug 31, 2022
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Rupinderjit Singh authored
Internal IP are updated with their public IP names. Signed-off-by:
Rupinderjit Singh <rupinderjit.singh@arm.com> Change-Id: I1f60bdd89207ee56d2a08c83fea3c025d8422c50
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Ahmed Gadallah authored
The timer module depends on the timer driver to enable and disable the timer's interrupt source, however the timer module is the one that clears the interrupt flag. This behavior is explained in the timer driver API to avoid ambiguity for timer driver developers. Signed-off-by:
Ahmed Gadallah <ahmed.gadallah@arm.com> Change-Id: I982a9bffd3618c6b514e280e4601d4a58a9ce34a
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- Aug 25, 2022
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Chandni Cherukuri authored
Morello SoC supports 32 GB dual rank DIMMs. To support this, the RTT_PARK value is updated to work with the dual rank DIMMs. Signed-off-by:
Chandni Cherukuri <chandni.cherukuri@arm.com> Change-Id: I85c442a618163a6b4e8de88c9e512f4733b773fd
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Brett Warren authored
There was a typo in Makefile.cmake which caused the VERBOSE flag to replace rather than append the command options passed to cmake --build. This is needed to reenable the scp-code-coverage-v2 jenkins job, which was broken by this change. Signed-off-by:
Brett Warren <brett.warren@arm.com> Change-Id: I0ac824ed70b93f59d1a535122c413fd2836eda5a
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- Aug 17, 2022
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Brett Warren authored
This commit demonstrates how to test features flags which may be used by a module. Resource permissions API is mocked to facillitate this demonstration. Signed-off-by:
Brett Warren <brett.warren@arm.com> Change-Id: Iea2f79583dec32e8ce2066879d06778528a2819e
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Brett Warren authored
Signed-off-by:
Brett Warren <brett.warren@arm.com> Change-Id: I56ddce94685909566ccbc773393f5844af4dde22
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Brett Warren authored
The removed comments are either irrelevent or merged into another requirement/task. Signed-off-by:
Brett Warren <brett.warren@arm.com> Change-Id: I99aabe0194c147d5460442b3f1ce12d21ffa3df2
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Brett Warren authored
Make TEST_ON_TARGET select the minimal scp_ut image and expose it in Makefile.cmake. Signed-off-by:
Brett Warren <brett.warren@arm.com> Change-Id: Ica51affb30b83a0cb598b68672375c4d828e32bf
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Girish Pathak authored
This commits add a bare minimum ram firmware(bl2) to execute unit tests based on Unity/CMock framework. Change-Id: Ie2e5ce418cafac09ba0c73bcf41fddf4cbdfc934 Signed-off-by:
Girish Pathak <girish.pathak@arm.com>
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Girish Pathak authored
This commits adds a unit test module which can be used to execute Unity/CMock based tests on target hardware/model. This module basically links to unity/cmock framework and calls specific tests from it's init function. As an example few SCMI tests are added to demonstrate the use of this module. Please note that, SCP must run bare minimum SCP firmware(bl2) with at least with one UART. Subsequent commit will demonstrate a bare minimum bl2 firmware on the Juno board that include module/ut Change-Id: If20731a0e82240c47f6df4a41a1e6253c0e79a07 Signed-off-by:
Girish Pathak <girish.pathak@arm.com>
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Tarek El-Sherbiny authored
For modules that consist of more than one source code file, there is a need to create multiple unit_test files for each c file. This change introduces 2 new variables which need to be populated by the local CMake file. By submitting this change it is possible to have more than one unit_test file for the same module. Existing modules have been modified to sync with this change. Signed-off-by:
Tarek El-Sherbiny <tarek.el-sherbiny@arm.com> Change-Id: If588589a88b98f0d6b3d557bb6c4f3305ac63340
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Brett Warren authored
Test modules can now optionally include module_common.cmake as a base for their own cmake files, reducing the amount of redundant code present previously. Signed-off-by:
Brett Warren <brett.warren@arm.com> Change-Id: I4c4aeb912a6a19bda654627a6a35900a417d0d46
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- Aug 16, 2022
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Tomás Agustín González Orlando authored
The timer base address on the LCP of the rdfremont platform was outdated. Correct it to the new address. Change-Id: I7dd0c485e83c93a539596c343c0b452533861b45 Signed-off-by:
Tomás Agustín González Orlando <tomasagustin.gonzalezorlando@arm.com>
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Tomás Agustín González Orlando authored
This patch adds support for the Fast Channel Extension to the MHUv3 drivers. As the drivers have to be modified to use the transport layer, this patch also includes changes to the doorbell channel usage via the transport layer. Change-Id: I4f48338baba4f2847bd4633b3d026933a64845d1 Signed-off-by:
Tomás Agustín González Orlando <tomasagustin.gonzalezorlando@arm.com>
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Tomás Agustín González Orlando authored
Add the transport module and its configuration file to the rdfremont platform. Adding this module is required for adding fast channels to the MHUv3 driver. The config file for the transport module for the rdfremont product is a dummy that will be configured once the MHUv3 driver is setup. Change-Id: I0505a14e4fe600b43be0eaca0b353dd1deb38d11 Signed-off-by:
Tomás Agustín González Orlando <tomasagustin.gonzalezorlando@arm.com>
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Tomás Agustín González Orlando authored
Enable the BUILD_HAS_FAST_CHANNELS via the build system. This constant may be used by any module that provides fast channel functionality to other modules (hence the generic constant name). Currently, the only module that does so is the transport module. This commit also enables BUILD_HAS_FAST_CHANNELS in the case where SCMI_PERF_FAST_CHANNELS is used. In the future, if a new module that implements fast channel functionality is created, then it should also make sure that it enables the generic fast channels constant in the same way as with SCMI_PERF_FAST_CHANNELS. Change-Id: Ieac39cd97671456e3735b411af903d5a00b06e34 Signed-off-by:
Tomás Agustín González Orlando <tomasagustin.gonzalezorlando@arm.com>
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- Aug 15, 2022
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Chuyue Luo authored
Add unit tests for scmi_perf_protocol_version_handler(), scmi_perf_protocol_attributes_handler() and scmi_perf_protocol_message_attributes_handler(). Signed-off-by:
Chuyue Luo <Chuyue.Luo@arm.com> Change-Id: I4c3f4139952889d2d3f71ba7261c3098e8d9879d
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- Aug 10, 2022
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Anders Dellien authored
Add TC2 BL1 module that implements the boot flow, with MHU (doorbell) signalling to/from RSS. BL1 will signal the RSS to indicate that startup is complete, then wait for another signal from RSS before powering on the AP CPUs. Signed-off-by:
Anders Dellien <anders.dellien@arm.com> Change-Id: I2747bd0d07e867764c9a498ae87a985f4b6b7035 Signed-off-by:
Tintu Thomas <tintu.thomas@arm.com>
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- Aug 08, 2022
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Anurag Koul authored
The communication between SCP and the on-board PCC (Platform Configuration Controller) on Morello, is currently based on shared memory based transport - which is prone to vulnerabilities and isn't secure. This patch leverages the I2C interface between SCP and the PCC to migrate the communication over to the I2C channel. Signed-off-by:
Anurag Koul <anurag.koul@arm.com> Change-Id: I33120c6e5699fa82349603ab8808059fe7b9dc6b
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Anurag Koul authored
Changes to enhance/improve cdns_i2c driver polling-based routines: 1. Provide FIFO depth and maximum transfer size as module config parameters as they are configurable in the RTL. 2. I2C transfers exceeding FIFO depth would silently fail. Add handling to send and receive data sizes requested by the caller module. This leverages Cadence I2C FIFO depth and the Transfer Size Register (TSR) parameters, which are both configured in the RTL. 3. Add handling for transferring data sizes exceeding the maximum transfer size (given by TSR). 4. As an extension to point 3 above, add a workaround to continue with the data transfer in 'I2C Receiver' mode when the TSR counter reaches 0. This is a limitation with the IP (possibly a bug), where the I2C transfer terminates upon TSR reaching 0 even when the HOLD bit is set. The workaround handles this by ensuring that TSR doesn't drop to 0 until the last byte of data has been received. Signed-off-by:
Anurag Koul <anurag.koul@arm.com> Change-Id: I1849b6c41ecfe79228d3123716003cf1faef1de3
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