- Jun 15, 2023
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This patch adds support for querying whether FF-A v1.1 is supported by the FF-A impplementation. Signed-off-by:
Achin Gupta <achin.gupta@arm.com> Signed-off-by:
Nishant Sharma <nishant.sharma@arm.com> Change-Id: I008ba98ca31200067a4e3cb8b51b0c236b301f8d
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This patch copies the value of the corresponding stack variable to a global variable so that it can be used to determine whether FF-A v1.1 or earlier ABIs should be used for communication with the SPMC. Signed-off-by:
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This patch skips zero sized sections in the StMM SP image e.g. .reloc since there is no point in attempting to change their permissions. Signed-off-by:
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This patch adds support for creating a hoblist from the reduced boot information retrieved from the SP manifest. Signed-off-by:
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This patch discovers the SP manifest in DT format passed by the SPMC. It then parses it to obtain the boot information required to initialise the SP. Signed-off-by:
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For better or worse, an StMM SP can communicate with the SPM through one of these interfaces. 1. Original TF-A specific interface exported by the SPM 2. FF-A v1.0 interface 3. FF-A v1.1 interface 2) implements only minimal FF-A support. It reuses the initialisation ABI defined by 1) and wraps the remaining communicaton in FFA_MSG_SEND_DIRECT_REQ/RESP ABIs. 3) uses FF-A ABIs from the spec for both initialisation and communication. Detecting these variations in the GetSpmVersion() function is tedious. This patch restores the original function that discovered configuration 1). It defines a new function to discover presence of FF-A and differentiate between v1.0 and v1.1. Signed-off-by:
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With FF-A v1.1, the SPMC sends a reduced amount of boot information as compared to the original SPM implementation. For example, the stack layout, MP information etc. This information could be accommodated in the old data structure but this is too complicated. This patch defines a new structure to clearly separate FF-A v1.1 and other functionality. Signed-off-by:
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This patch uses the FFA_MEM_PERM_GET/SET ABIs to tweak the permissions of a set of pages if FF-A v1.1 and above is supported by the SPMC. For FF-A v1.0 the previous method through FFA_MSG_SEND_DIRECT_REQ/RESP is used. Signed-off-by:
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Add new fid for Success, error and wait. Also add macro to generate FFA verions. Signed-off-by:
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The SPMC will pass the manifest to the StMM SP which contains the boot information required for SP initialisation. This patch defines the data structures defined in Section 5.4 of the FF-A v1.1 BETA0 spec to enable this support. The manifest is identified by the TF-A UUID_TOS_FW_CONFIG. Signed-off-by:
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The StMM SP will extract boot information from its manifest instead of a C data structure populated by the SPM. The manifest will be passed by the SPM. This patch includes support for libfdt to prepare for parsing the manifest in future patches. Signed-off-by:
Sayanta Pattanayak <sayanta.pattanayak@arm.com> Signed-off-by:
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This patch removes the dependency on the SPM to allocate and initialise stack memory for the StMM SP. This is done by reserving 8K worth of memory in the StMM image at a page aligned address in the data section. Then, instead of jumping directly to the C entrypoint, an assembler entrypoint is invoked. This entrypoint locates the stack memory, changes its permissions using FF-A ABIs, sets the stack pointer and invokes the C entrypoint. Signed-off-by:
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FeatureFlag type PCD flags are declared by typecasting an integer value to BOOLEAN. These flags cannot be use in assembly code as assembler does not recognise C primitive types. Change the flag data type from BOOLEAN to UINT32. Signed-off-by: -
CXL Early Discovery Table (CEDT) enables OSes to locate CXL Host Bridges and location of Host Bridge Registers early during boot and configure Host Bridge Decoders according to ACPI information. This patch adds CEDT structures of type CXL Host Bridge Structure (CHBS) and CXL Fixed Memory Window Structure (CFMWS) according to CXL specification, Revision 3.0, Version 0.7. Signed-off-by: -
These APIs are needed by SSDT table generator used to generate PCIe SSDT tables. Add new API to update DWord resource data in the precompiled asl config. Update QWordUpdate API to take in translate field. Change-Id: Ic7fc51d04690449209182452ce1f7fa7b83da318 Signed-off-by: -
Include the Acpi.h header file to Arm Error Source Table definition. Signed-off-by:Omkar Anand Kulkarni <omkar.kulkarni@arm.com> Change-Id: I4d372e518ea2c10cf5256f79dae7b531105ef402
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When MM Communicate message length is zero, then avoid the overhead of copying the buffers. Signed-off-by: -
Add a new parser for the Hardware Error Source Table (HEST) described in the ACPI specification version 6.3. Signed-off-by: -
Added a readme file that explains the software framework for dynamic generation of HEST table. Signed-off-by: -
Add helper macros for the generation of the HEST ACPI table. Macros to initialize the HEST GHESv2 Notification Structure and Error Status Structure are introduced. Signed-off-by: -
Add a macro to determine the size of EFI_MM_COMMUNICATE_HEADER structure header. Signed-off-by: -
Add a driver that retreives error source descriptors from MM and populates those into the HEST ACPI table. The error source descriptors that are available from the MM side are retreived using MM Communicate 2 protocol. The first call into the MM returns the size of MM Communicate buffer required to hold all error source descriptor info. The communication buffer of that size is then allocated and the second call into MM returns the error source descriptors in the communication buffer. The retreived error source descriptors are then appended to the HEST table. Co-authored-by:
Thomas Abraham <thomas.abraham@arm.com> Signed-off-by:
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Add the protocol definition of the MM_HEST_ERROR_SOURCE_DESC_PROTOCOL protocol. This protocol can be implemented by MM drivers to publish error source descriptors that have to be populated into HEST table. Co-authored-by:
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Introduce the HEST table generation protocol that allows platforms to build the table with multiple error source descriptors and install the table. The protocol provides two interfaces. The first interface allows for adding multiple error source descriptors into the HEST table. The second interface can then be used to dynamically install the fully populated HEST table. This allows multiple drivers and/or libraries to dynamically register error source descriptors into the HEST table. Co-authored-by:
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Add CPER definitions for ARM Processor error section per UEFI 2.8 errata b spec. The definitions are part of Section N.2.4.4 of Appendix N (Common Platform Error Record). Signed-off-by: -
add definitions, macros and types for elements associated with MPAM ACPI 1.0 specification. Signed-off-by:Rohit Mathew <rohit.mathew@arm.com> Change-Id: Idc2764fcbf666af105731c43c00027562c37fee0
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- Jun 14, 2023
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BruceX Wang authored
Fix incorrect code on AddSectionHeader32() and AddSectionHeader64() Cc: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Signed-off-by:
BruceX Wang <brucex.wang@intel.com> Reviewed-by:
Gua Guo <gua.guo@intel.com>
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- Jun 13, 2023
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MarsX Lin authored
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4479 Add CAPSULE_SUPPORT to optionally select CapsuleLib instance, default value is FALSE. Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Reviewed-by:
James Lu <james.lu@intel.com> Cc: Guo Dong <guo.dong@intel.com> Signed-off-by:
MarsX Lin <marsx.lin@intel.com>
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Ray Ni authored
Signed-off-by:
Ray Ni <ray.ni@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Reviewed-by:
Zhichao Gao <zhichao.gao@intel.com> Reviewed-by:
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Ray Ni authored
The Shell binaries are not generated anymore in each stable tag release. So, remove the section. Reviewed-by:
Ard Biesheuvel <ardb+tianocore@kernel.org> Signed-off-by:
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Zhiguang Liu authored
This library supports a PeiServicesTablePointerLib implementation that allows code dependent upon PeiServicesTable to operate in an isolated execution environment such as within the context of a host-based unit test framework. The unit test should initialize the PeiServicesTable database with any required elements (e.g. PPIs, Hob etc.) prior to the services being invoked by code under test. It is strongly recommended to clean any global databases by using EFI_PEI_SERVICES.ResetSystem2 after every unit test so the tests execute in a predictable manner from a clean state. Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by:
Michael Kubacki <mikuback@linux.microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by:
Zhiguang Liu <zhiguang.liu@intel.com>
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- Jun 08, 2023
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Simon Wang authored
The initial version of Smbios Specification 3.6.0 type 45 and type 46 support. Signed-off-by:
Simon Wang <simowang@nvidia.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by:
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- Jun 07, 2023
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Gua Guo authored
Currently, have two command for pre-build binary support 1. --BuildEntryOnly: build UPL Entry file 2. --PreBuildUplBinary: build UPL binary based on UPL And these two commands should be exclusived, shouldn't have chance run it in the meantime. Case1: Build UPL entry with CLANGDWARF python UefiPayloadPkg/UniversalPayloadBuild.py --BuildEntryOnly Case2: Use pre-built UPL entry and build other fv by VS2019 python UefiPayloadPkg/UniversalPayloadBuild.py -t VS2019 \ --PreBuildUplBinary UniversalPayload.elf Case3: Build UPL Entry with CLANGDWARF and build other fv by VS2019 python UefiPayloadPkg/UniversalPayloadBuild.py -t VS2019 Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Signed-off-by: -
Ray Ni authored
Add Ray, remove Jiewen. Signed-off-by:
Sami Mujawar <sami.mujawar@arm.com> Reviewed-by:
Jiewen Yao <jiewen.yao@intel.com>
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Sami Mujawar authored
Supreeth is no longer supreeth.venkatesh@arm.com. Therefore, remove the reviewer entry from StandaloneMmPkg. Signed-off-by: -
Nickle Wang authored
RedfishClientPkg is moved from edk2-staging repository to edk2-redfish-client repository. Update the link in Readme.md to new location. Signed-off-by:
Nickle Wang <nicklew@nvidia.com> Cc: Abner Chang <abner.chang@amd.com> Cc: Igor Kulchytskyy <igork@ami.com> Reviewed-by:
Abner Chang <abner.chang@amd.com>
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Neo Hsueh authored
If there is no port multiplier, PortMultiplierPort should be converted to 0 to follow AHCI spec. The same logic already applied in AtaAtapiPassThruDxe driver. Signed-off-by:
Neo Hsueh <Hong-Chih.Hsueh@amd.com> Acked-by:
Hao A Wu <hao.a.wu@intel.com>
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- Jun 06, 2023
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Yong Li authored
Implement the SpeculationBarrier with implementations consisting of fence instruction which provides finer-grain memory orderings. Perform Data Barrier in RiscV: fence rw,rw Perform Instruction Barrier in RiscV: fence.i; fence r,r More detail is in Appendix A: RVWMO Explanatory Material in https://github.com/riscv/riscv-isa-manual This API is first introduced in the below commits for IA32 and x64 https://github.com/tianocore/edk2/commit/d9f1cac51bd354507e880e614d11a1dc160d38a3 https://github.com/tianocore/edk2/commit/e83d841fdc2878959185c4c6cc38a7a1e88377a4 and below the commit for ARM and AArch64 implementation https://github.com/tianocore/edk2/commit/c0959b4426b2da45cdb8146a5116bb4fd9b86534 This commit is to add the RiscV64 implementation which will be used by variable service under Variable/RuntimeDxe Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Evan Chai <evan.chai@intel.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Tuan Phan <tphan@ventanamicro.com> Signed-off-by:
Yong Li <yong.li@intel.com> Reviewed-by:
Sunil V L <sunilvl@ventanamicro.com>
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Aryeh Chen authored
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4474 ACPI_Spec_6_5_Aug29 Table 5.19 page 128 that MADT Revision field is 6. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by:
Aryeh Chen <aryeh.chen@intel.com> Reviewed-by:
Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by:
Liming Gao <gaoliming@byosoft.com.cn> Tested-by:
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