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Commit 4b1dd5c4 authored by Ard Biesheuvel's avatar Ard Biesheuvel
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ArmVirtPkg: clear PcdPerformanceLibraryPropertyMask PCD



The only observeable effect of having PcdPerformanceLibraryPropertyMask
set to 1 is that a EfiReservedMemory region of 4 pages is allocated right
below the 4 GB mark. This region is out of bounds for the OS, which means
it is not even allowed to map it, to avoid speculative loads from it.

On Linux, this may prevent the kernel from using a 1 GB block mapping for
this region, and instead it has to carve up the block as follows:

  0xffffffff80000000-0xffffffffbe000000         992M PMD CON BLK
  0xffffffffbe000000-0xffffffffbfe00000          30M PMD     BLK
  0xffffffffbfe00000-0xffffffffbfff0000        1984K PTE CON
  0xffffffffbfff0000-0xffffffffbfffc000          48K PTE

where it would otherwise use a single 1 GB mapping (*), i.e.,

  0xffffffff80000000-0xffffffffc0000000           1G PGD

To clarify, the latter is a single 8 byte entry in the top level page
table, whereas in the former case, we have two additional levels of
paging, requiring two extra 4 KB pages (on a 4 KB pagesize kernel).

The real cost, however, is the TLB footprint, which goes up from a
single entry to a number between 90 and 1020, depending on whether
contiguous hints are honoured by the hardware.

So let's remove PcdPerformanceLibraryPropertyMask until we find a reason
why we need it.

(*) provided that no other allocations were deliberately located right
    below the 4 GB mark, and that we are running with more than 3 GB of
    memory, in which case most allocations will be over 4 GB, given EDK2's
    default top-down allocation policy.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: default avatarLaszlo Ersek <lersek@redhat.com>
parent 9fba024e
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