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Commit fec35378 authored by Abner Chang's avatar Abner Chang
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ProcessorPkg/Library: RISC-V CPU library



This library provides CSR assembly functions to read/write RISC-V
specific Control and Status registers.

Signed-off-by: default avatarAbner Chang <abner.chang@hpe.com>
Co-authored-by: default avatarGilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: default avatarLeif Lindholm <leif.lindholm@linaro.org>

Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
parent 5801cae1
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