Platform/RPi/AcpiTables: Add Static PPTT tables

ACPI 6.2 adds a new table, which describes how processing units
are related to each other in tree like fashion. Caches are
also sprinkled throughout the tree and describe the properties
of the caches in relation to other caches and processing units.

Add a static PPTT table with one L2 cache and an L1I/L1D cache
for each of the 4 cores. The cache size/assc/policy/etc are from
the public docs.

The source from the aslc is derived from the one in:
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Pptt.aslc

Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>