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Commit 1dcbbdc8 authored by Prabin CA's avatar Prabin CA
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Platform/Sgi: Use PCD value for L2 cache size in PPTT table



The PcdL2CacheSize PCD specifies the size of L2 cache of the CPU.
Use the size specified by this PCD in the PPTT table of the
RD-N2 platform.

The PLAT_L2_CACHE_SIZE build time parameter is used to set the size of
the CPU's L2 cache and this allows changing the value of the L2 cache
size depending the variant of the RD-N2 platform being build. RD-V2
platform is an example of such a variant.

Signed-off-by: Prabin CA's avatarPrabin CA <prabin.ca@arm.com>
parent 6f55cf7b
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