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MLBEDSW-9531: Use tensor alignment flag in Regor

Johan Gunnarsson requested to merge MLBEDSW-9531 into main

This flag is used when allocating scratch memory and not using separate IO regions. Read only memory and staging memory is never accessed from CPU keep using the default NPU alignment for those tensors.

Signed-off-by: Johan Gunnarsson johan.gunnarsson@arm.com Change-Id: I0977e671b1b2948781e5dd52ba686019b1ffa921

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