Jacob Bohlin authored Feb 19, 2025 and Rickard Bolin committed Feb 20, 2025

Also includes:
* Zero point fix for PadV2.
* Fix OFM slices for paddings.
* Added quantization to IFM of the MemoryCopys.

Change-Id: I60cc1c2693d38709a42cb2614395aec241687a5d
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>

Incorrect shape used to calculate sizes when reshaping to 3D

Change-Id: Ie8ddf8f7397ea68a1e4bcb0361b99a18b1235112
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>

Only tensor storage shape was updated in rewrite, however the
connection shape needs to be updated as well.

Change-Id: I7adf5deb4d0041b92dc4be9a8395e87433b164db
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>

Add documentation of the allowed output formats

Change-Id: Ibf2207e6acba61f98f93c35efbe31c948aaabc21
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>

Rickard Bolin authored Feb 05, 2025 and Fredrik Svedberg committed Feb 18, 2025

Update SUPPORTED_OPS.md to include MIRROR_PAD, SELECT and SELECT_V2 for
Ethos-U85.

Change-Id: I15f8671c1034b0645cae377bb1dfc1fabcb17b33
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>

--verbose-weights no longer displays NPU Weights Size

Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
Change-Id: I117ae64a50e8bbe6d9564973e4ac026b5ac11aad

* Generic solution to reshape to 3D and always pad in W-dimension was
causing performance regressions due to limitations in utilizing NHCWB16
format. With this change the reshape solution is only used when
necessary.
* Also cleaned up the RewritePad function a bit and made it so
MemoryCopy is always used for applying the padding regardless of NPU.
Previously elementwise NOT was used for Ethos-U85.

Change-Id: I813d04caa165da4eb9586d220a0ff1554bb07083
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>

The HLC op's ifm list is better created by inserting the
ifm's in the correct order; rather than asserting that
the originating order was incorrect.

Signed-off-by: Philip Hall <philip.hall@arm.com>
Change-Id: Idb737bd2418d921e94198a81a53d322365dae7e6

Fixed DCO checking for merge requests from forks.

Change-Id: I94eadc5ef1287d1cc3cdd7680dfc8265bd5d137f
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>

 - Added former fallback mechanism to replace ReduceSum with a
1x1 Conv2D operation when Rescale is not available

Change-Id: I4b2a26a80fc2e6de3262217c29094532306417a5
Signed-off-by: Johan Alfvén <johan.alfven@arm.com>

Alexander Bengtsson authored Feb 13, 2025 and Johan Alfvén committed Feb 13, 2025

- Empty quantizations are interpreted as unit-scales in RCS
  Do the same thing in SupportsFusedRescale

Change-Id: Ia9becbd4db8746d29eb65ad9d5389171deffa99d
Signed-off-by: Alexander Bengtsson <Alexander.Bengtsson@arm.com>

Alexander Bengtsson authored Feb 13, 2025 and Alexander Bengtsson committed Feb 13, 2025

- MLBEDSW-9591: OpType::Passthrough
  Slices should not be moved to CPU-operations

- MLBEDSW-10426: OpType::Tile
  The RCS-TILE lowering assumes unsliced IFM.

Change-Id: I923a650fc3ab127b1ff7e2b4c18d0a692a666372
Signed-off-by: Alexander Bengtsson <Alexander.Bengtsson@arm.com>

Alexander Bengtsson authored Feb 12, 2025 and Alexander Bengtsson committed Feb 13, 2025

Change-Id: Id9ee6c1e1a40cf68dbf050c4d94bb37754208468
Signed-off-by: Alexander Bengtsson <Alexander.Bengtsson@arm.com>

 - Pad and trim input shapes for Ethos-U55 transpose
implementation to 4 axes.
 - Fix depth-slicing by using correct depths for
NWHC ifm and ofm strides.

Signed-off-by: Philip Hall <philip.hall@arm.com>
Change-Id: Ic9b6aeb259ce9249c402bdb1e4c1308929ce7995

Fixed dilation decomposition in height and width dimensions
for CONV3D sub operations.

Change-Id: Id3b232b6e2ea5fd5a49ebde2671ae99739e949d2
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>

Philip Hall authored Feb 11, 2025 and Fredrik Svedberg committed Feb 12, 2025

Recent ordered map traversal checks showed CAST
operator inserts its IFMs in permuted order. This
rearranges the IFMs to match traversal order.

Signed-off-by: Philip Hall <philip.hall@arm.com>
Change-Id: Id3c9b4b43a2afb7f9cfc757d99e26d224d3960e3

Alexander Bengtsson authored Feb 11, 2025 and Alexander Bengtsson committed Feb 11, 2025

- ReduceSum only supports unit scaling on the IFM, update
  architectureConstraints to account for this.

Change-Id: If072b0f3c6d92b631c1d0cae71336e5293f7ab08
Signed-off-by: Alexander Bengtsson <Alexander.Bengtsson@arm.com>

Alexander Bengtsson authored Feb 10, 2025 and Alexander Bengtsson committed Feb 11, 2025

- Maintain rounding when lowering ReduceSum.
- Fix shape of intermediate tensor when ReduceSum is lowered to
  ReduceSum + Sub (shape should be inherited from the tensor
  connection)
- Keep quantization on the ReduceSum when ReduceSum is lowered
  to Transpose + ReduceSum.

Change-Id: I9653f3638bbda8fa287a3f8a32c4bd3abe4e79ae
Signed-off-by: Alexander Bengtsson <Alexander.Bengtsson@arm.com>

A recent update let NPU op tests continue past the
Transpose/Reverse operator check, allowing it to fail on
unrelated data type criteria. This prevented INT32 transposes
from being compiled. This commit inverts the check back
for an early return.

Signed-off-by: Philip Hall <philip.hall@arm.com>
Change-Id: I404b71047aa401e4f70bb754dd9ac4f676d3d792

Added initial support for TOSA CONV3D.

Change-Id: Id4de4a11da26a555f05941f08d8f176309fcefda
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>

Avoid having separate handling of TFLite Pad now that GraphIR lowering
supports all Ethos-U targets. TFLite graph optimiser will now convert
TFLite Pad to TOSA Pad which is then target-dependetly lowered in
GraphIR optimiser.

Change-Id: Id133173173721556f85a4231184bc70018333fe2
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>

Philip Hall authored Jan 27, 2025 and Fredrik Svedberg committed Feb 10, 2025

Update constraints query mechanism to allow the architecture
to return additional requirements for executing operators
(including allocating scratch tensors).

 - Added matmul handling stubs for Ethos-U55.
 - Fixed tflite Resize operator check.
 - Fixed missing Sigmoid/LUT conversion checks.
 - Fixed bisecting search failure test in graph builder.

Signed-off-by: Philip Hall <philip.hall@arm.com>
Change-Id: I8a612f709cc2d846caf13ec8b18d309c4cc66753

Philip Hall authored Jan 31, 2025 and Fredrik Svedberg committed Feb 10, 2025

HLCS generation uses a positional equivalence between
tensor index and tensor usage to map ifms from Schedule
IR to HLCS. This doesn't scale and required looping over
a fixed number of IFMs.

 - Switch from positional to tensor-usage based IFM
   mappings.
 - Allow potentially unlimited input IFMs for HLCS
   operators.
 - Improved field layout of HLCFeaturemap to reduce
   memory wasted by padding.

Signed-off-by: Philip Hall <philip.hall@arm.com>
Change-Id: Iea517eb8994e70ba3d8c0618dfd487706e785b60

Updated contribution documentation with information about forks.

Change-Id: I47c03c03aa2bf90013705941b6342b9dbb6207ef
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>

Added DCO check to CICD pipeline.

Change-Id: I9eeec783935cc01725b2656aee7bc57a8696b864
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>

William Isaksson authored Dec 09, 2024 and Fredrik Svedberg committed Feb 06, 2025

This patch adds trackability for scheduled ops.

Change-Id: I93181468b2459150026785f49ef128ec72998a5d
Signed-off-by: William Isaksson <william.isaksson@arm.com>

Adds check to check that already optimised ops are not added as source ops in the GraphIR pass.

Change-Id: Ib966080f7ee3b5bf4e52ef9e601dcc37153dcdfe
Signed-off-by: William Isaksson <william.isaksson@arm.com>

 - AreaFit failed to find a shape for a small aspect ratio. The
adjustment ratio step was too small and the retry counter
caused the iteration to break before finding a solution
 - The fix is to increase the allowed number of iterations and
as a last resort change the scaling ratio

Change-Id: Ic07e1cc60beae592dc832c9e71706d87621b1219
Signed-off-by: Johan Alfvén <johan.alfven@arm.com>

There are cases where, for example, a QUANTIZE op has a constant
tensor input, but shapless output. With this patch, OFM will
inherit IFM's shape for certain ops.

Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
Change-Id: Ibcdc503ed56cbe0822e3d5d33dfde76f5620cd07

 - Find block config for an AvgPool failed and triggered an assert
 - Adding a final step which halves the depth until minimum granule
depth is reached solves the problem

Change-Id: I81689fb26e20744b5f5b23226570ef8df499b8ea
Signed-off-by: Johan Alfvén <johan.alfven@arm.com>

This is a regression since af541e72.

Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
Change-Id: I53a5a555d738a8e2527a70e0c5f2ad7dcb6baf29

Johan Gunnarsson authored Jan 24, 2025 and Fredrik Svedberg committed Feb 03, 2025

Index 0 is unstrided so we can always allow reading that index
regardless of stride. Also added a few more asserts.

Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
Change-Id: Icf7ac8c46665d4e651232d0c0ba66733dce99dc6

Updating pybind11 to the newest version changed our build to use the
"Classic" pybind11 Python mode. Set PYBIND11_FINDPYTHON ON to use the
"New" Python mode, which was used before the update.

Change-Id: Ia54ef7363dba259778151de920e11959484580a0
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>

Updated workflow rules.

Change-Id: I5f05858bef52e08872092cac2e6fc2d3bf1711e3
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>

Mauricio Briceno authored Jan 24, 2025 and Fredrik Svedberg committed Jan 29, 2025

- Warns when a Destination path is different from its normalized version
- This happens for the wheels' destination directory
- But this is benign as there's a trailing path separator that gets
  removed by the path normalization algorithm resulting in essentially
  the same original path

Change-Id: Ie6f6382941ea533d3b68b5acf275a0f7c07291d5
Signed-off-by: Mauricio Briceno <mauricio.briceno@arm.com>

- Regenerated TFLite schema with mutable API
- TFLite reader: implement mechanism to load buffers at the end
  of the file as described in the schema
- Update vela.py to read via mmap
- TFlite writer: implement mechanism to write buffers at the end of the
  file as described in the schema

Change-Id: I169a5f0e512f1b038393145495ec7040be783969
Signed-off-by: Mauricio Briceno <mauricio.briceno@arm.com>

Added initial CI/CD pipelines and Dockerfile for building the
runner Docker image.

Change-Id: I14dccd8c28e5e8c703210a3ca18a16ef673614c4
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>

Philip Hall authored Jan 27, 2025 and Fredrik Svedberg committed Jan 28, 2025

An obscure cast issue occured during another implementation
where attempting to cast the bitflags object causes it to
take the implicit boolean value, rather than the explicit
unsigned cast.

 - This commit prevents such casts by removing the
   implicit boolean cast.
 - Added specific flag-test operator, resulting in
   an actual boolean value.
 - Allowed double-negation semantics (!!) to check
   for non-zero flags.

Signed-off-by: Philip Hall <philip.hall@arm.com>
Change-Id: Ide581e840a0c848be68bbc3249518ab901ce480b

Alexander Bengtsson authored Jan 27, 2025 and Alexander Bengtsson committed Jan 28, 2025

- OFM-fusing of Rescales is only valid if the Rescale
  operation (to be fused) is the single consumer of
  the preceding operations OFM.

Change-Id: Ie341d3e462cf7ce7ec4721f83b459d364542304c
Signed-off-by: Alexander Bengtsson <Alexander.Bengtsson@arm.com>

 - Normalise the sized types used by ordered_map to present
   an interface more consistent with the standard library.
 - Set initial allocation to zero such that declaring an
   empty map allocates no storage, and add tests for the
   same. Storage is now allocated on first-use.
 - Fix potential range issue with initial hashtable size
   being greater than the chosen indexer.
 - Fix issue where it was not possible to resize up to
   the maximum indexer limit.

Signed-off-by: Philip Hall <philip.hall@arm.com>
Change-Id: I12742431808d73625ac6bcdbd7b701b52f763834