Cache related changes from core_driver update

The driver now calls the cache flush/clean before each NPU command
stream with a full list of base pointers/base addresses and their size.
This allows full freedom to implement any desired logic for cache
coherence management outside of the driver. This changes the function
prototype for the flush and invalidate functions.

This commit provides example implementations of the flush and invalidate
functions, looping over the base addresses. Note the important cast (on
32bit systems) for the base addresses, which is there to avoid sign
expansion when casting to a pointer from a type bigger than the pointer
size.

Change-Id: Ia3faa05aba8aac7c1c7bb59c05dd3f5d2b44caa0
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>