Cache usage optimizations

Align tensor arena to 32 bytes (cache line). Alignment is defined in the
code with an attribute, and in the scatter and linker files where
possible.

Remove ethosu_flush_dcache() implementation, this is no longer
recommended to be implemented. Application code where the CPU cache is
used and program writes to shared memory between CPU and NPU should take
care of cache coherency.

Full cache invalidation is no longer supported as this might cause
issues on certain systems/implementations, especially in async cases.

Change-Id: I599d33d60af4cfebe288a651edddb33b6b5434ee
Signed-off-by: Jonny Svärd <jonny.svaerd@arm.com>