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- Aug 19, 2019
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https://gitlab.denx.de/u-boot/custodians/u-boot-rockchipTom Rini authored
- Add ROC-RK3399-PC board support - Move CONFIG_SPI_FLASH_GIGADEVICE and CONFIG_CMD_USB_MASS_STORAGE to Kconfig - using SYSRESET_POWER_OFF for poweroff (Note that patch for rk8xx pmic is droped for it can not pass Travis build) - fix ofnode_get_name() assert
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https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini authored
- QEMU build warning fix when CONFIG_DISTRO_DEFAULTS=n - Small fixes on x86 reST docs - Allow CBFS to be used in SPL - Remove x86 specific GD flags
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Urja Rannikko authored
This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF to signal when we need it. Enable it from the STPMIC1 config and in sandbox. The config flag is transitionary, that is it can be removed after all poweroff implementations use sysreset, and just have CMD_POWEROFF depend on sysreset. Signed-off-by:
Urja Rannikko <urjaman@gmail.com> Reviewed-by:
Patrice Chotard <patrice.chotard@st.com> Reviewed-by:
Patrick Delaunay <patrick.delaunay@st.com> Tested-by:
Patrick Delaunay <patrick.delaunay@st.com>
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Urja Rannikko authored
It seems that SYSRESET_POWER_OFF was added recently, and all previous code used SYSRESET_POWER for poweroff. SYSRESET_POWER is supposed to be a PMIC-level power cycle, not a poweroff. (Comment by Simon Glass) SYSRESET_POWER means to do a power reset (removing and reinstating all power) SYSRESET_POWER_OFF means to turn the device off and leave it off Signed-off-by:
Urja Rannikko <urjaman@gmail.com> Reviewed-by:
Patrick Delaunay <patrick.delaunay@st.com> (Update comment to help understand the patch) Signed-off-by:
Kever Yang <kever.yang@rock-chips.com>
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Urja Rannikko authored
Updates jerry, mickey, minnie and speedy defconfigs to: - fit the SPL in 32k - boot from SPI (only) - remove gadget support (these have no OTG port) Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Urja Rannikko <urjaman@gmail.com> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com> (Rebase on top of tree) Signed-off-by:
Kever Yang <kever.yang@rock-chips.com>
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Urja Rannikko authored
This affects RK3036, RK322X and RK3288 - the defconfig changes done by moveconfig.py for the veyrons were left out on purpose because they dont have an OTG port, and will get their config updated in the next commit. Signed-off-by:
Urja Rannikko <urjaman@gmail.com> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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Urja Rannikko authored
Affects rk3288 veyrons and rk3036, this was mostly done by moveconfig.py. Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Urja Rannikko <urjaman@gmail.com> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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Kever Yang authored
In some case with LIVE DT, some node always not valid, or not have a valid name, eg. blk driver add by mmc. Return fail instead of Assert for this kind of ofnode, and this help with assert happen from time to time when of_live is enabled and DEBUG is enabled. Signed-off-by:
Kever Yang <kever.yang@rock-chips.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Levin Du authored
Add initial support for ROC-RK3399-PC board. Specification - Rockchip RK3399 - LPDDR4 4GiB - eMMC slot - SD card slot - RTL8211E 1Gbps - HDMI Out, DP, MIPI DSI/CSI, EDP - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-roc-pc.dts sync from Linux v5.2: "arm64: dts: rockchip: add support for ROC-RK3399-PC board" (sha1: 8bb878cf20ae10809c36db96993bfce7026d062b) Signed-off-by:
Levin Du <djw@t-chip.com.cn> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com>
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- Aug 18, 2019
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Stefan Roese authored
With the removal of the x86 specific GD flags, there are no arch- specific GD flags any more. Let's remove the comment about reserving the upper 16 bits for arch-specific flags in the common header. This gives us more flexibility with the usage of the GD flags. As a matter of fact, we are already using more than 16 bits for common GD flags (with the addition of GD_FLG_WDT_READY). Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Stefan Roese authored
This patch removes the x86 architecture specific GD flags (GD_FLG_COLD_BOOT & GD_FLG_WARM_BOOT), as they are not used. Only GD_FLG_COLD_BOOT is referenced in coreboot.c but assigned in start16.S. But the coreboot target does not use start16.S at all and boots directly from the 32-bit start code. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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Simon Glass authored
Rename some camel-case variables to match U-Boot style. Camel case is not generally allowed in U-Boot. Rename this variable to fit in with the style. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
Sometimes an image has multiple CBFS. The current CBFS API is limited to handling only one at time. Also it keeps track of the CBFS internally in BSS, which does not work before relocation, for example. Add a few new functions to overcome these limitations. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
Move the result variable into the struct also, so that it can be used when BSS is not available. Add a function to read it. Note that all functions sill use the BSS version of the data. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
At present there are a number of static variables in BSS. This cannot work with SPL, at least until BSS is available in board_init_r(). Move the variables into a struct, so it is possible to malloc() it and use it before BSS is available. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
At present this file has a function at the top, above declarations. This is normally avoided, so fix it. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
Add a new Kconfig option to enable CBFS in SPL. This can be useful when the memory-init code is in CBFS. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com>
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Heinrich Schuchardt authored
Correctly reference uefi/uefi.rst and uefi/u-boot_on_efi.rst. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com>
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Heinrich Schuchardt authored
Avoid a warning when building the 'make htmldocs' target: doc/board/intel/slimbootloader.rst:90: WARNING: Title underline too short. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com>
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Bin Meng authored
Use DISTRO_BOOTENV to decouple BOOTENV from CONFIG_DISTRO_DEFAULTS. Reported-by:
Heinrich Schuchardt <xypron.debian@gmx.de> Signed-off-by:
Bin Meng <bmeng.cn@gmail.com>
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- Aug 17, 2019
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https://gitlab.denx.de/u-boot/custodians/u-boot-efiTom Rini authored
Pull request for UEFI sub-system for v2019.10-rc3 This pull request provides corrections for the SetVirtualAddress runtime service and avoids possible calls to NULL by consumers of the EFI_PXE_BASE_CODE_PROTOCOL.
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- Aug 16, 2019
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https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini authored
- Fix sifive serial y-modem transfer. - Access CSRs using CSR numbers. - Update doc sifive-fu540 - Support big endian hosts and target.
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- Aug 15, 2019
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Heinrich Schuchardt authored
Commit 7f95104d ("efi_loader: detach runtime in ExitBootServices()") added a call to efi_runtime_detach() to ExitBootServices() but did not remove the call in SetVirtualAddressMap(). Remove the superfluous function call. Correct a comment referring to efi_runtime_detach(). Fixes: 7f95104d ("efi_loader: detach runtime in ExitBootServices()") Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
Check the parameters DescriptorSize and DescriptiorVersion of SetVirtualAddressMap() as prescribed by the UEFI specification. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
U-Boot implements the EFI_PXE_BASE_CODE_PROTOCOL because GRUB uses the mode information for booting via PXE. All function pointers in the protocol were NULL up to now which will cause immediate crashes when the services of the protocol are called. Create function stubs for all services of the protocol returning EFI_UNSUPPORTED. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Simon Goldschmidt authored
The socfpga gen5 SPL manually zeroed bss in board_init_f(). Now that the DDR driver does not use bss any more, bss is not used before board_init_r() and we can remove this hack. bss is normally zeroed by crt0.S, but after board_init_f(), before board_init_r(). socfpga just had this double-zeroing because it invalidly used bss in board_init_f() already (during DDR initialization). Signed-off-by:
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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Dalon Westergreen authored
Bring cyclone5 / arria5 / arria10 in line with convention and use u-boot.img as CONFIG_SPL_FS_LOAD_PAYLOAD_NAME. Signed-off-by:
Dalon Westergreen <dalon.westergreen@intel.com>
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Ley Foon Tan authored
The CONFIG name should be SYSRESET_SOCFPGA_S10 instead of SYSRESET_SOCFPGA_STRATIX10. Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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Marcus Comstedt authored
Signed-off-by:
Marcus Comstedt <marcus@mc.pp.se> Cc: Rick Chen <rick@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Marcus Comstedt authored
All ELF fields whose values are inspected by the code are converted to CPU byteorder first. Values which are copied verbatim (relocation fixups) are not swapped to CPU byteorder and back as it is not needed. Signed-off-by:
Marcus Comstedt <marcus@mc.pp.se> Cc: Rick Chen <rick@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Anup Patel authored
We should explicitly load DTB from TFTP server or MMC/SD card for Linux booting. This will allow us: 1. To use different Linux DTB for SiFive Unleashed board with expansion board connected. 2. Avoid re-flashing OpenSBI firmware whenever board connections change. This patch updates reference bootlog in SiFive FU540 README as-per above. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Joe Hershberger <joe.hershberger@ni.com>
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Bin Meng authored
We should prefer accessing CSRs using their CSR numbers because: 1. It compiles fine with older toolchains. 2. We can use latest CSR names in #define macro names of CSR numbers as-per RISC-V spec. 3. We can access newly added CSRs even if toolchain does not recognize newly added CSRs by name. This commit is inspired from Linux kernel commit a3182c91ef4e ("RISC-V: Access CSRs using CSR numbers"). Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Rick Chen <rick@andestech.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Lukas Auer <lukas.auer@aisec.fraunhofer.de>
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Bin Meng authored
This syncs csr.h with Linux kernel 5.2, and imports asm.h that is required by csr.h. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Rick Chen <rick@andestech.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Lukas Auer <lukas.auer@aisec.fraunhofer.de>
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Sagar Shrikant Kadam authored
In y-modem transfer mode, tstc/getc fail to check if there is any data available / received in RX FIFO, and so y-modem transfer never succeeds. Using receive watermark bit within ip register fixes the issue. This patch is based on commit c7392b7bc4e1 ("Use the RX watermark interrupt pending bit for TSTC") available at[1] [1] https://github.com/sifive/HiFive_U-Boot/tree/regression Signed-off-by:
Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com> Tested-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Padmarao Begari <padmarao.begari@microchip.com> Tested-by:
Padmarao Begari <padmarao.begari@microchip.com>
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- Aug 14, 2019
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Tom Rini authored
Rsync all defconfig files using moveconfig.py Signed-off-by:
Tom Rini <trini@konsulko.com>
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- Aug 13, 2019
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@konsulko.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini authored
- Various improvements to Keymile boards - mostly DT conversation (Pascal & Holger) - Removal of now unsupported Keymile boards (Pascal & Holger) - Small MVEBU PCI fix (Marek) - Turris Omnia defconfig update (Marek) - Misc Allied Telesis defconfig updates (Chris)
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https://gitlab.denx.de/u-boot/custodians/u-boot-amlogicTom Rini authored
- amlogic: add support for the SEI Robotic SEI510
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- Aug 12, 2019
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Tom Rini authored
- More DaVinci updates and fixes - PCIe support on am65x - Watchdog converted to DM - Assorted other bugfixes
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