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  1. Mar 27, 2008
    • Stefan Roese's avatar
      ppc: Add CFG_MEM_TOP_HIDE option to hide memory area that doesn't get "touched" · 14f73ca6
      Stefan Roese authored
      
      
      If CFG_MEM_TOP_HIDE is defined in the board config header, this specified
      memory area will get subtracted from the top (end) of ram and won't get
      "touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel
      should gets passed the now "corrected" memory size and won't touch it
      either. This should work for arch/ppc and arch/powerpc. Only Linux board
      ports in arch/powerpc with bootwrapper support, which recalculate the
      memory size from the SDRAM controller setup, will have to get fixed
      in Linux additionally.
      
      This patch enables this config option on some PPC440EPx boards as a workaround
      for the CHIP 11 errata. Here the description from the AMCC documentation:
      
      CHIP_11: End of memory range area restricted access.
      Category: 3
      
      Overview:
      The 440EPx DDR controller does not acknowledge any
      transaction which is determined to be crossing over the
      end-of-memory-range boundary, even if the starting address is
      within valid memory space. Any such transaction from any PLB4
      master will result in a PLB time-out on PLB4 bus.
      
      Impact:
      In case of such misaligned bursts, PLB4 masters will not
      retrieve any data at all, just the available data up to the
      end of memory, especially the 440 CPU. For example, if a CPU
      instruction required an operand located in memory within the
      last 7 words of memory, the DCU master would burst read 8
      words to update the data cache and cross over the
      end-of-memory-range boundary. Such a DCU read would not be
      answered by the DDR controller, resulting in a PLB4 time-out
      and ultimately in a Machine Check interrupt. The data would
      be inaccessible to the CPU.
      
      Workaround:
      Forbid any application to access the last 256 bytes of DDR
      memory. For example, make your operating system believe that
      the last 256 bytes of DDR memory are absent. AMCC has a patch
      that does this, available for Linux.
      
      This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards:
      lwmon5, korat, sequoia
      
      The other remaining 440EPx board were intentionally not included
      since it is not clear to me, if they use the end of ram for some
      other purpose. This is unclear, since these boards have CONFIG_PRAM
      defined and even comments like this:
      
      PMC440.h:
      /* esd expects pram at end of physical memory.
       * So no logbuffer at the moment.
       */
      
      It is strongly recommended to not use the last 256 bytes on those
      boards too. Patches from the board maintainers are welcome.
      
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      14f73ca6
  2. Mar 26, 2008
  3. Mar 19, 2008
  4. Mar 16, 2008
  5. Mar 12, 2008
  6. Feb 14, 2008
    • Wolfgang Denk's avatar
      PPC: Use r2 instead of r29 as global data pointer · e7670f6c
      Wolfgang Denk authored
      
      
      R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc
      will refuse to use load/store multiple insns; instead, it issues a
      list of simple load/store instructions upon function entry and exit,
      resulting in bigger code size, which in turn makes the build for a
      few boards fail.
      
      Use r2 instead.
      
      Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
      e7670f6c
  7. Feb 05, 2008
  8. Jan 18, 2008
  9. Jan 17, 2008
  10. Jan 11, 2008
  11. Jan 09, 2008
  12. Dec 17, 2007
  13. Nov 03, 2007
  14. Aug 28, 2007
  15. Aug 16, 2007
  16. Aug 14, 2007
  17. Aug 10, 2007
  18. Aug 06, 2007
  19. Jul 10, 2007
  20. Jul 03, 2007
  21. Jun 22, 2007
    • Heiko Schocher's avatar
      [PCS440EP] upgrade the PCS440EP board: · 566a494f
      Heiko Schocher authored
      
                      - Show on the Status LEDs, some States of the board.
                      - Get the MAC addresses from the EEProm
                      - use PREBOOT
                      - use the CF on the board.
                      - check the U-Boot image in the Flash with a SHA1
                        checksum.
                      - use dynamic TLB entries generation for the SDRAM
      
      Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
      566a494f
  22. Jun 18, 2007
    • TsiChung Liew's avatar
      Added M5329AFEE and M5329BFEE Platforms · 8e585f02
      TsiChung Liew authored
      
      
      Added board/freescale/m5329evb, cpu/mcf532x, drivers/net,
      drivers/serial,  immap_5329.h, m5329.h, mcfrtc.h,
      include/configs/M5329EVB.h, lib_m68k/interrupts.c, and
      rtc/mcfrtc.c
      
      Modified CREDITS, MAKEFILE, Makefile, README, common/cmd_bdinfo.c,
      common/cmd_mii.c, include/asm-m68k/byteorder.h, include/asm-m68k/fec.h,
      include/asm-m68k/io.h, include/asm-m68k/mcftimer.h,
      include/asm-m68k/mcfuart.h, include/asm-m68k/ptrace.h,
      include/asm-m68k/u-boot.h, lib_m68k/Makefile, lib_m68k/board.c,
      lib_m68k/time.c, net/eth.c and rtc/Makefile
      
      Signed-off-by: default avatarTsiChung Liew <Tsi-Chung.Liew@freescale.com>
      8e585f02
  23. Jun 06, 2007
  24. May 05, 2007
  25. Mar 31, 2007
  26. Mar 26, 2007
  27. Feb 20, 2007
  28. Nov 27, 2006
  29. Nov 04, 2006
    • Timur Tabi's avatar
      mpc83xx: Update 83xx to use fsl_i2c.c · be5e6181
      Timur Tabi authored
      
      
      Update the 83xx tree to use I2C support in drivers/fsl_i2c.c.  Delete
      cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
      Added multiple I2C bus support to fsl_i2c.c.
      
      Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
      be5e6181
    • Timur Tabi's avatar
      mpc83xx: Add support for the MPC8349E-mITX · 2ad6b513
      Timur Tabi authored
      
      
      PREREQUISITE PATCHES:
      
      * This patch can only be applied after the following patches have been applied:
      
        1) DNX#2006090742000024 "Add support for multiple I2C buses"
        2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
        3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
        4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
        5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"
      
      CHANGELOG:
      
      * Add support for the Freescale MPC8349E-mITX reference design platform.
        The second TSEC (Vitesse 7385 switch) is not supported at this time.
      
      Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
      2ad6b513
    • Ben Warren's avatar
      Add support for multiple I2C buses · bb99ad6d
      Ben Warren authored
      
      
      Hello,
      
      Attached is a patch providing support for multiple I2C buses at the
      command level.  The second part of the patch includes an implementation
      for the MPC834x CPU and MPC8349EMDS board.
      
      /*** Note: This patch replaces ticket DNX#2006083042000018 ***/
      
      Signed-off-by: default avatarBen Warren <bwarren@qstreams.com>
      
      Overview:
      
      1. Include new 'i2c' command (based on USB implementation) using
      CONFIG_I2C_CMD_TREE.
      
      2. Allow multiple buses by defining CONFIG_I2C_MULTI_BUS.  Note that
      the commands to change bus number and speed are only available under the
      new 'i2c' command mentioned in the first bullet.
      
      3. The option CFG_I2C_NOPROBES has been expanded to work in multi-bus
      systems.  When CONFIG_I2C_MULTI_BUS is used, this option takes the form
      of an array of bus-device pairs.  Otherwise, it is an array of uchar.
      
      CHANGELOG:
              Added new 'i2c' master command for all I2C interaction.  This is
      conditionally compiled with CONFIG_I2C_CMD_TREE.  New commands added for
      setting I2C bus speed as well as changing the active bus if the board
      has more than one (conditionally compiled with
      CONFIG_I2C_MULTI_BUS).  Updated NOPROBE logic to handle multiple buses.
      Updated README.
      
      regards,
      Ben
      bb99ad6d
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