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Commit 2cf041ab authored by Aditya Angadi's avatar Aditya Angadi Committed by tarek-arm
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product/rdn2: add configuration data for subsytem clock driver 



Provide setup data i.e source pll, member table and rate table for css
clocks.

Change-Id: I364db8652a29c5f9a9567d0844ba1de74025d9b8
Signed-off-by: Aditya Angadi's avatarAditya Angadi <aditya.angadi@arm.com>
parent da5839da
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